/linux-master/drivers/irqchip/ |
H A D | irq-gic-v3-mbi.c | 43 irq_hw_number_t hwirq) 64 fwspec.param[1] = hwirq - 32; 75 static void mbi_free_msi(struct mbi_range *mbi, unsigned int hwirq, argument 79 bitmap_release_region(mbi->bm, hwirq - mbi->spi_start, 89 int hwirq, offset, i, err = 0; local 106 hwirq = mbi->spi_start + offset; 114 err = mbi_irq_gic_domain_alloc(domain, virq + i, hwirq + i); 118 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, 126 mbi_free_msi(mbi, hwirq, nr_irqs); 136 mbi_free_msi(mbi, d->hwirq, nr_irq 41 mbi_irq_gic_domain_alloc(struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq) argument [all...] |
H A D | irq-imx-irqsteer.c | 50 int idx = imx_irqsteer_get_reg_index(data, d->hwirq); 56 val |= BIT(d->hwirq % 32); 64 int idx = imx_irqsteer_get_reg_index(data, d->hwirq); 70 val &= ~BIT(d->hwirq % 32); 82 irq_hw_number_t hwirq) 111 int hwirq; local 117 hwirq = imx_irqsteer_get_hwirq_base(data, irq); 118 if (hwirq < 0) { 119 pr_warn("%s: unable to get hwirq base for irq %d\n", 124 for (i = 0; i < 2; i++, hwirq 81 imx_irqsteer_irq_map(struct irq_domain *h, unsigned int irq, irq_hw_number_t hwirq) argument [all...] |
H A D | irq-idt3243x.c | 31 u32 pending, hwirq; local 38 hwirq = __fls(pending); 39 generic_handle_domain_irq(idtpic->irq_domain, hwirq); 40 pending &= ~(1 << hwirq);
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H A D | irq-goldfish-pic.c | 37 u32 pending, hwirq; local 43 hwirq = __fls(pending); 44 generic_handle_domain_irq(gfpic->irq_domain, hwirq); 45 pending &= ~(1 << hwirq);
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H A D | irq-digicolor.c | 39 u32 status, hwirq; local 44 hwirq = ffs(status) - 1; 48 hwirq = ffs(status) - 1 + 32; 53 generic_handle_domain_irq(digicolor_irq_domain, hwirq);
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H A D | irq-gic-v2m.c | 100 static phys_addr_t gicv2m_get_msi_addr(struct v2m_data *v2m, int hwirq) argument 103 return v2m->res.start | ((hwirq - 32) << 3); 111 phys_addr_t addr = gicv2m_get_msi_addr(v2m, data->hwirq); 119 msg->data = data->hwirq; 137 irq_hw_number_t hwirq) 147 fwspec.param[1] = hwirq - 32; 152 fwspec.param[0] = hwirq; 168 static void gicv2m_unalloc_msi(struct v2m_data *v2m, unsigned int hwirq, argument 172 bitmap_release_region(v2m->bm, hwirq - v2m->spi_start, 182 int hwirq, offse local 135 gicv2m_irq_gic_domain_alloc(struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq) argument [all...] |
H A D | irq-vt8500.c | 74 void __iomem *stat_reg = base + VT8500_ICIS + (d->hwirq < 32 ? 0 : 4); 78 edge = readb(base + VT8500_ICDC + d->hwirq) & VT8500_EDGE; 82 status |= (1 << (d->hwirq & 0x1f)); 85 dctr = readb(base + VT8500_ICDC + d->hwirq); 87 writeb(dctr, base + VT8500_ICDC + d->hwirq); 97 dctr = readb(base + VT8500_ICDC + d->hwirq); 99 writeb(dctr, base + VT8500_ICDC + d->hwirq); 108 dctr = readb(base + VT8500_ICDC + d->hwirq); 127 writeb(dctr, base + VT8500_ICDC + d->hwirq);
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H A D | irq-dw-apb-ictl.c | 43 u32 hwirq = ffs(stat) - 1; local 45 generic_handle_domain_irq(d, hwirq); 46 stat &= ~BIT(hwirq); 64 u32 hwirq = ffs(stat) - 1; local 65 generic_handle_domain_irq(d, gc->irq_base + hwirq); 67 stat &= ~BIT(hwirq); 78 irq_hw_number_t hwirq; local 82 ret = irq_domain_translate_onecell(domain, fwspec, &hwirq, &type); 87 irq_map_generic_chip(domain, virq + i, hwirq + i);
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H A D | irq-ti-sci-intr.c | 48 * ti_sci_intr_irq_domain_translate() - Retrieve hwirq and type from 52 * @hwirq: IRQ number identified by hardware 59 unsigned long *hwirq, 67 *hwirq = fwspec->param[0]; 74 * ti_sci_intr_xlate_irq() - Translate hwirq to parent's hwirq. 119 intr->ti_sci_id, data->hwirq, 130 * @hwirq: Corresponding hwirq for the IRQ within this IRQ domain 135 unsigned int virq, u32 hwirq) 57 ti_sci_intr_irq_domain_translate(struct irq_domain *domain, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument 134 ti_sci_intr_alloc_parent_irq(struct irq_domain *domain, unsigned int virq, u32 hwirq) argument 199 unsigned long hwirq; local [all...] |
H A D | irq-keystone.c | 62 kirq->mask |= BIT(d->hwirq); 63 dev_dbg(kirq->dev, "mask %lu [%x]\n", d->hwirq, kirq->mask); 70 kirq->mask &= ~BIT(d->hwirq); 71 dev_dbg(kirq->dev, "unmask %lu [%x]\n", d->hwirq, kirq->mask); 105 dev_warn_ratelimited(kirq->dev, "spurious irq detected hwirq %d\n", 196 int hwirq; local 200 for (hwirq = 0; hwirq < KEYSTONE_N_IRQ; hwirq++) 201 irq_dispose_mapping(irq_find_mapping(kirq->irqd, hwirq)); [all...] |
H A D | irq-riscv-aplic-direct.c | 68 target = priv->regs + APLIC_TARGET_BASE + (d->hwirq - 1) * sizeof(u32); 94 unsigned long *hwirq, unsigned int *type) 98 return aplic_irqdomain_translate(fwspec, priv->gsi_base, hwirq, type); 107 irq_hw_number_t hwirq; local 111 ret = aplic_irqdomain_translate(fwspec, priv->gsi_base, &hwirq, &type); 116 irq_domain_set_info(domain, virq + i, hwirq + i, &aplic_direct_chip, 224 u32 v, hwirq; local 240 rc = aplic_direct_parse_parent_hwirq(dev, i, &hwirq, &hartid); 250 if (hwirq != RV_IRQ_EXT) 93 aplic_direct_irqdomain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument
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H A D | irq-ti-sci-inta.c | 30 #define HWIRQ_TO_DEVID(hwirq) (((hwirq) >> (TI_SCI_DEV_ID_SHIFT)) & \ 32 #define HWIRQ_TO_IRQID(hwirq) ((hwirq) & (TI_SCI_IRQ_ID_MASK)) 47 * hwirq and vint bit. 49 * @hwirq: Hwirq of the incoming interrupt 54 u32 hwirq; member in struct:ti_sci_inta_event_desc 118 static u16 ti_sci_inta_get_dev_id(struct ti_sci_inta_irq_domain *inta, u32 hwirq) argument 120 u16 dev_id = HWIRQ_TO_DEVID(hwirq); 163 generic_handle_domain_irq(domain, vint_desc->events[bit].hwirq); 279 ti_sci_inta_alloc_event(struct ti_sci_inta_vint_desc *vint_desc, u16 free_bit, u32 hwirq) argument 324 ti_sci_inta_alloc_irq(struct irq_domain *domain, u32 hwirq) argument 384 ti_sci_inta_free_irq(struct ti_sci_inta_event_desc *event_desc, u32 hwirq) argument [all...] |
H A D | irq-mvebu-icu.c | 113 writel_relaxed(icu_int, icu->base + ICU_INT_CFG(d->hwirq)); 124 if (d->hwirq == ICU_SATA0_ICU_ID || d->hwirq == ICU_SATA1_ICU_ID) { 152 unsigned long *hwirq, unsigned int *type) 166 *hwirq = fwspec->param[1]; 174 *hwirq = fwspec->param[0]; 187 if (*hwirq >= ICU_MAX_IRQS) { 188 dev_err(icu->dev, "invalid interrupt number %ld\n", *hwirq); 200 unsigned long hwirq; local 211 err = mvebu_icu_irq_domain_translate(domain, fwspec, &hwirq, 151 mvebu_icu_irq_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument [all...] |
H A D | irq-armada-370-xp.c | 174 irq_hw_number_t hwirq = irqd_to_hwirq(d); local 176 if (!is_percpu_irq(hwirq)) 177 writel(hwirq, main_int_base + 180 writel(hwirq, per_cpu_int_base + 186 irq_hw_number_t hwirq = irqd_to_hwirq(d); local 188 if (!is_percpu_irq(hwirq)) 189 writel(hwirq, main_int_base + 192 writel(hwirq, per_cpu_int_base + 216 msg->data = BIT(cpu + 8) | (data->hwirq + PCI_MSI_DOORBELL_START); 246 int hwirq, local 469 irq_hw_number_t hwirq = irqd_to_hwirq(d); local [all...] |
H A D | irq-bcm2836.c | 46 d->hwirq - LOCAL_IRQ_CNTPSIRQ, 53 d->hwirq - LOCAL_IRQ_CNTPSIRQ, 144 u32 hwirq = ffs(stat) - 1; local 146 generic_handle_domain_irq(intc.domain, hwirq); 163 int hwirq = ffs(mbox_val) - 1; local 164 generic_handle_domain_irq(ipi_domain, hwirq); 174 writel_relaxed(BIT(d->hwirq), 191 writel_relaxed(BIT(d->hwirq), mailbox0_base + 16 * cpu);
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H A D | irq-clps711x.c | 93 irq_hw_number_t hwirq = irqd_to_hwirq(d); local 95 writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hwirq].eoi); 100 irq_hw_number_t hwirq = irqd_to_hwirq(d); local 101 void __iomem *intmr = clps711x_intc->intmr[hwirq / 16]; 105 tmp &= ~(1 << (hwirq % 16)); 111 irq_hw_number_t hwirq = irqd_to_hwirq(d); local 112 void __iomem *intmr = clps711x_intc->intmr[hwirq / 16]; 116 tmp |= 1 << (hwirq % 16);
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/linux-master/arch/mips/lantiq/ |
H A D | irq.c | 80 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; 98 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; 117 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; 133 unsigned long offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; 160 if (d->hwirq == ltq_eiu_irq[i]) { 187 type, d->hwirq); 192 irq_set_handler(d->hwirq, handle_edge_irq); 211 if (d->hwirq == ltq_eiu_irq[i]) { 233 if (d->hwirq == ltq_eiu_irq[i]) { 290 irq_hw_number_t hwirq; local [all...] |
/linux-master/drivers/misc/cxl/ |
H A D | api.c | 186 irq_hw_number_t hwirq; local 198 hwirq = cxl_find_afu_irq(ctx, 0); 199 if (hwirq) 200 cxl_map_irq(ctx->afu->adapter, hwirq, cxl_ops->psl_interrupt, ctx, "psl"); 215 irq_hw_number_t hwirq; local 219 hwirq = cxl_find_afu_irq(ctx, 0); 220 if (hwirq) { 221 virq = irq_find_mapping(NULL, hwirq); 234 irq_hw_number_t hwirq; local 239 hwirq 249 irq_hw_number_t hwirq; local [all...] |
/linux-master/include/linux/ |
H A D | irqdomain.h | 286 irq_hw_number_t hwirq, int node, 393 irq_hw_number_t hwirq); 399 irq_hw_number_t hwirq, 405 irq_hw_number_t hwirq) 407 return irq_create_mapping_affinity(host, hwirq, NULL); 411 irq_hw_number_t hwirq, 415 irq_hw_number_t hwirq) 417 return __irq_resolve_mapping(domain, hwirq, NULL); 423 * @hwirq: hardware irq number in that domain space 426 irq_hw_number_t hwirq) 404 irq_create_mapping(struct irq_domain *host, irq_hw_number_t hwirq) argument 414 irq_resolve_mapping(struct irq_domain *domain, irq_hw_number_t hwirq) argument 425 irq_find_mapping(struct irq_domain *domain, irq_hw_number_t hwirq) argument 436 irq_linear_revmap(struct irq_domain *domain, irq_hw_number_t hwirq) argument 627 msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq, unsigned int type) argument [all...] |
/linux-master/drivers/gpio/ |
H A D | gpio-lpc18xx.c | 82 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, 86 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, 102 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, 106 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, 122 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, 137 lpc18xx_gpio_pin_ic_isel(ic, d->hwirq, true); 138 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, 141 lpc18xx_gpio_pin_ic_isel(ic, d->hwirq, true); 142 lpc18xx_gpio_pin_ic_set(ic, d->hwirq, 145 lpc18xx_gpio_pin_ic_isel(ic, d->hwirq, fals 168 irq_hw_number_t hwirq; local [all...] |
H A D | gpio-ts5500.c | 37 u8 hwirq; member in struct:ts5500_priv 273 return priv->hwirq; 284 if (priv->hwirq == 7) 286 else if (priv->hwirq == 6) 288 else if (priv->hwirq == 1) 302 if (priv->hwirq == 7) 304 else if (priv->hwirq == 6) 306 else if (priv->hwirq == 1) 309 dev_err(priv->gpio_chip.parent, "invalid hwirq %d\n", 310 priv->hwirq); [all...] |
H A D | gpio-crystalcove.c | 187 irq_hw_number_t hwirq = irqd_to_hwirq(data); local 189 if (hwirq >= CRYSTALCOVE_GPIO_NUM) 224 irq_hw_number_t hwirq = irqd_to_hwirq(data); local 227 crystalcove_update_irq_ctrl(cg, hwirq); 229 crystalcove_update_irq_mask(cg, hwirq); 239 irq_hw_number_t hwirq = irqd_to_hwirq(data); local 241 if (hwirq >= CRYSTALCOVE_GPIO_NUM) 244 gpiochip_enable_irq(gc, hwirq); 254 irq_hw_number_t hwirq = irqd_to_hwirq(data); local 256 if (hwirq > [all...] |
H A D | gpio-sa1100.c | 129 unsigned int mask = BIT(d->hwirq); 158 writel_relaxed(BIT(d->hwirq), sgc->membase + R_GEDR); 164 unsigned int mask = BIT(d->hwirq); 174 unsigned int mask = BIT(d->hwirq); 184 int ret = sa11x0_gpio_set_wake(d->hwirq, on); 187 sgc->irqwake |= BIT(d->hwirq); 189 sgc->irqwake &= ~BIT(d->hwirq); 207 unsigned int irq, irq_hw_number_t hwirq) 206 sa1100_gpio_irqdomain_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) argument
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/linux-master/arch/powerpc/sysdev/xics/ |
H A D | xics-common.c | 327 irq_hw_number_t hwirq) 329 pr_devel("xics: map virq %d, hwirq 0x%lx\n", virq, hwirq); 339 if (hwirq == XICS_IPI) { 348 if (xics_ics->check(xics_ics, hwirq)) 352 irq_domain_set_info(domain, virq, hwirq, xics_ics->chip, 416 unsigned long *hwirq, unsigned int *type) 419 fwspec->param_count, hwirq, type); 426 irq_hw_number_t hwirq; local 430 rc = xics_host_domain_translate(domain, fwspec, &hwirq, 326 xics_host_map(struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq) argument 415 xics_host_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec, unsigned long *hwirq, unsigned int *type) argument [all...] |
/linux-master/drivers/pci/controller/ |
H A D | pcie-mediatek-gen3.c | 462 unsigned long hwirq; local 464 hwirq = data->hwirq % PCIE_MSI_IRQS_PER_SET; 468 msg->data = hwirq; 470 hwirq, msg->address_hi, msg->address_lo, msg->data); 476 unsigned long hwirq; local 478 hwirq = data->hwirq % PCIE_MSI_IRQS_PER_SET; 480 writel_relaxed(BIT(hwirq), msi_set->base + PCIE_MSI_SET_STATUS_OFFSET); 487 unsigned long hwirq, flag local 503 unsigned long hwirq, flags; local 530 int i, hwirq, set_idx; local 611 unsigned long hwirq; local 625 mtk_pcie_intx_map(struct irq_domain *domain, unsigned int irq, irq_hw_number_t hwirq) argument 713 irq_hw_number_t bit, hwirq; local [all...] |