/linux-master/drivers/auxdisplay/ |
H A D | charlcd.c | 208 /* check for display mode flags */ 213 lcd->ops->display(lcd, CHARLCD_ON); 220 lcd->ops->display(lcd, CHARLCD_OFF); 314 case 'L': /* shift display left */ 318 case 'R': /* shift display right */ 337 case 'I': /* reinitialize display */ 402 /* quickly clear the display */ 441 /* clear the display */ 579 * before this line, we must NOT send anything to the display. 590 /* display [all...] |
H A D | lcd2s.c | 4 * The display also has a SPI interface, but the driver does not support 128 /* turn everything off, but display on */ 282 .display = lcd2s_display, 305 /* Test, if the display is responding */ 319 err = device_property_read_u32(&i2c->dev, "display-height-chars", 324 err = device_property_read_u32(&i2c->dev, "display-width-chars", 374 MODULE_DESCRIPTION("LCD2S character display driver");
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/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_dp_aux.c | 104 freq = i915->display.cdclk.hw.cdclk; 891 wake_up_all(&i915->display.gmbus.wait_queue);
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H A D | intel_dp.c | 38 #include <drm/display/drm_dp_helper.h> 39 #include <drm/display/drm_dp_tunnel.h> 40 #include <drm/display/drm_dsc_helper.h> 41 #include <drm/display/drm_hdmi_helper.h> 817 i915->display.cdclk.max_cdclk_freq * ppc * bigjoiner_interface_bits / 904 if (mode_clock >= ((i915->display.cdclk.max_cdclk_freq * 85) / 100)) 1216 return clock > i915->display.cdclk.max_dotclk_freq || hdisplay > 5120 || 1230 int max_dotclk = dev_priv->display.cdclk.max_dotclk_freq; 2404 * Pipe joiner needs compression up to display 12 due to bandwidth 2725 * as it allows more power-savings by complete shutting down display, [all...] |
H A D | intel_dp_hdcp.c | 9 #include <drm/display/drm_dp_helper.h> 10 #include <drm/display/drm_dp_mst_helper.h> 11 #include <drm/display/drm_hdcp_helper.h>
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H A D | intel_tc.c | 131 * The display power domains used for TC ports depending on the 490 u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin]; 520 * Return the PHY status complete flag indicating that display can acquire the 522 * is connected and it's ready to switch the ownership to display. The flag 524 * owned by the TBT subsystem and so switching the ownership to display is not 610 * display, USB, etc. As a result, handshaking through FIA is required around 774 u32 cpu_isr_bits = i915->display.hotplug.hpd[hpd_pin]; 775 u32 pch_isr_bit = i915->display.hotplug.pch_hpd[hpd_pin]; 798 * Return the PHY status complete flag indicating that display can acquire the 800 * the ownership to display, regardles [all...] |
H A D | intel_sdvo.c | 34 #include <drm/display/drm_hdmi_helper.h> 1947 int max_dotclk = i915->display.cdclk.max_dotclk_freq; 2087 ddc = intel_gmbus_get_adapter(i915, i915->display.vbt.crt_ddc_pin); 2622 mapping = &dev_priv->display.vbt.sdvo_mappings[0]; 2624 mapping = &dev_priv->display.vbt.sdvo_mappings[1]; 2645 mapping = &dev_priv->display.vbt.sdvo_mappings[0]; 2647 mapping = &dev_priv->display.vbt.sdvo_mappings[1]; 2689 my_mapping = &dev_priv->display.vbt.sdvo_mappings[0]; 2690 other_mapping = &dev_priv->display.vbt.sdvo_mappings[1]; 2692 my_mapping = &dev_priv->display [all...] |
H A D | intel_psr.c | 47 * Since Haswell Display controller supports Panel Self-Refresh on display 49 * spec in eDP1.3. PSR feature allows the display to go to lower standby states 50 * when system is idle but display is on as it eliminates display refresh 52 * display is unchanged. 96 * When unmasked (nearly) all display register writes (eg. even 211 if (i915->display.params.enable_psr == -1) 213 return i915->display.params.enable_psr; 230 if (i915->display.params.enable_psr == 1) 702 if (dev_priv->display [all...] |
/linux-master/drivers/gpu/drm/sun4i/ |
H A D | sun4i_hdmi_enc.c | 86 struct drm_display_info *display = &hdmi->connector.display_info; local 152 if (display->is_hdmi)
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/linux-master/drivers/gpu/drm/bridge/cadence/ |
H A D | cdns-mhdp8546-core.h | 18 #include <drm/display/drm_dp_helper.h>
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/linux-master/drivers/gpu/drm/display/ |
H A D | drm_hdcp_helper.c | 16 #include <drm/display/drm_hdcp_helper.h> 268 * revoked state of the KSVs in the list passed in by display drivers are 400 * This function can be used by display drivers, to update the kernel triggered
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H A D | drm_dp_cec.c | 14 #include <drm/display/drm_dp_helper.h>
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H A D | drm_dp_tunnel.c | 13 #include <drm/display/drm_dp.h> 14 #include <drm/display/drm_dp_helper.h> 15 #include <drm/display/drm_dp_tunnel.h>
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/linux-master/tools/testing/selftests/bpf/ |
H A D | vmtest.sh | 249 -display none \
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/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/ |
H A D | amdgpu_dm.h | 29 #include <drm/display/drm_dp_mst_helper.h> 40 * This component provides all the display related functionality 127 * @dm: amdgpu display manager device 148 * display support for HDR. 152 * @aux_min_input_signal: Min brightness value supported by the display 156 * @aux_max_input_signal: Max brightness value supported by the display 173 * @aux_support: Describes if the display supports AUX backlight. 240 * struct amdgpu_display_manager - Central amdgpu display manager device 245 * @display_indexes_num: Max number of display streams supported 601 * struct is useful to keep track of the display [all...] |
/linux-master/drivers/gpu/drm/ |
H A D | Makefile | 159 obj-y += display/
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/linux-master/include/drm/ |
H A D | i915_hdcp_interface.h | 14 #include <drm/display/drm_hdcp.h>
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/linux-master/drivers/gpu/drm/i915/ |
H A D | i915_irq.c | 36 #include "display/intel_display_irq.h" 37 #include "display/intel_display_types.h" 38 #include "display/intel_hotplug.h" 39 #include "display/intel_hotplug_irq.h" 40 #include "display/intel_lpe_audio.h" 41 #include "display/intel_psr_regs.h" 705 if (dev_priv->display.irq.display_irqs_enabled) 770 if (dev_priv->display.irq.display_irqs_enabled) 787 if (dev_priv->display.irq.display_irqs_enabled) 841 if (dev_priv->display [all...] |
H A D | i915_driver.c | 48 #include "display/intel_acpi.h" 49 #include "display/intel_bw.h" 50 #include "display/intel_cdclk.h" 51 #include "display/intel_display_driver.h" 52 #include "display/intel_display_types.h" 53 #include "display/intel_dmc.h" 54 #include "display/intel_dp.h" 55 #include "display/intel_dpt.h" 56 #include "display/intel_fbdev.h" 57 #include "display/intel_hotplu [all...] |
/linux-master/drivers/gpu/drm/rockchip/ |
H A D | inno_hdmi.c | 467 struct drm_display_info *display = &hdmi->connector.display_info; local 476 v_HDMI_DVI(display->is_hdmi)); 482 if (display->is_hdmi)
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/linux-master/drivers/video/fbdev/ |
H A D | neofb.c | 20 * LCD is disabled, keep BIOS settings if internal/external display 40 * - no stretching if external display is enabled (dok) 429 vga_wseq(NULL, 0x01, tmp | 0x20); /* disable the display */ 436 vga_wseq(NULL, 0x01, tmp & ~0x20); /* reenable display */ 629 "Mode (%dx%d) won't display properly on LCD\n", 796 /* Initialize: by default, we want display config register to be read */ 799 /* Enable any user specified display devices. */ 806 /* If the user did not specify any display devices, then... */ 832 /* We need to program the VCLK for external display only mode. */ 889 * No centering required when the requested display widt 1767 unsigned char type, display; local [all...] |
H A D | cirrusfb.c | 921 /* enable display memory & CRTC I/O address for color mode */ 942 dev_dbg(info->device, "preparing for 1 bit deep display\n"); 1019 dev_dbg(info->device, "preparing for 8 bit deep display\n"); 1088 dev_dbg(info->device, "preparing for 16 bit deep display\n"); 1147 dev_dbg(info->device, "preparing for 24 bit deep display\n"); 1312 performs display panning - provided hardware permits this 1591 /* ext. display controls: ext.adr. wrap */ 1905 unsigned long *display, unsigned long *registers) 1908 assert(display != NULL); 1911 *display 1904 get_pci_addrs(const struct pci_dev *pdev, unsigned long *display, unsigned long *registers) argument [all...] |
/linux-master/drivers/net/wireless/intel/iwlegacy/ |
H A D | 4965.h | 43 int il4965_dump_fh(struct il_priv *il, char **buf, bool display);
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H A D | 3945.h | 180 bool display);
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/linux-master/drivers/gpu/drm/gma500/ |
H A D | intel_bios.c | 9 #include <drm/display/drm_dp_helper.h>
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