Searched refs:clk_data (Results 51 - 75 of 184) sorted by relevance

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/linux-master/drivers/clk/mediatek/
H A Dclk-mt8186-apmixedsys.c143 struct clk_hw_onecell_data *clk_data; local
148 clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK);
149 if (!clk_data)
155 pllfhs, ARRAY_SIZE(pllfhs), clk_data);
159 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
163 platform_set_drvdata(pdev, clk_data);
169 ARRAY_SIZE(pllfhs), clk_data);
171 mtk_free_clk_data(clk_data);
178 struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev); local
182 ARRAY_SIZE(pllfhs), clk_data);
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H A Dclk-mt7988-apmixed.c81 struct clk_hw_onecell_data *clk_data; local
85 clk_data = mtk_alloc_clk_data(ARRAY_SIZE(plls));
86 if (!clk_data)
89 r = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
93 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
100 mtk_clk_unregister_plls(plls, ARRAY_SIZE(plls), clk_data);
102 mtk_free_clk_data(clk_data);
H A Dclk-mt2712-apmixedsys.c114 struct clk_hw_onecell_data *clk_data; local
118 clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK);
119 if (!clk_data)
122 r = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
126 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
135 mtk_clk_unregister_plls(plls, ARRAY_SIZE(plls), clk_data);
137 mtk_free_clk_data(clk_data);
144 struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev); local
147 mtk_clk_unregister_plls(plls, ARRAY_SIZE(plls), clk_data);
148 mtk_free_clk_data(clk_data);
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H A Dclk-pllfh.c200 struct clk_hw_onecell_data *clk_data)
232 clk_data->hws[pll->id] = hw;
247 mtk_clk_unregister_pllfh(clk_data->hws[pll->id]);
249 mtk_clk_unregister_pll(clk_data->hws[pll->id]);
251 clk_data->hws[pll->id] = ERR_PTR(-ENOENT);
262 struct clk_hw_onecell_data *clk_data)
267 if (!clk_data)
275 if (IS_ERR_OR_NULL(clk_data->hws[pll->id]))
283 mtk_clk_unregister_pllfh(clk_data->hws[pll->id]);
285 base = mtk_clk_pll_get_base(clk_data
197 mtk_clk_register_pllfhs(struct device_node *node, const struct mtk_pll_data *plls, int num_plls, struct mtk_pllfh_data *pllfhs, int num_fhs, struct clk_hw_onecell_data *clk_data) argument
260 mtk_clk_unregister_pllfhs(const struct mtk_pll_data *plls, int num_plls, struct mtk_pllfh_data *pllfhs, int num_fhs, struct clk_hw_onecell_data *clk_data) argument
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H A Dclk-mt8173-infracfg.c135 struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev); local
138 mtk_clk_unregister_cpumuxes(cpu_muxes, ARRAY_SIZE(cpu_muxes), clk_data);
139 mtk_clk_unregister_gates(infra_gates, ARRAY_SIZE(infra_gates), clk_data);
140 mtk_free_clk_data(clk_data);
H A Dclk-mtk.h59 struct clk_hw_onecell_data *clk_data);
61 struct clk_hw_onecell_data *clk_data);
85 struct clk_hw_onecell_data *clk_data);
87 struct clk_hw_onecell_data *clk_data);
179 struct clk_hw_onecell_data *clk_data);
181 struct clk_hw_onecell_data *clk_data);
208 struct clk_hw_onecell_data *clk_data);
210 struct clk_hw_onecell_data *clk_data);
215 void mtk_free_clk_data(struct clk_hw_onecell_data *clk_data);
H A Dclk-mux.c220 struct clk_hw_onecell_data *clk_data)
235 if (!IS_ERR_OR_NULL(clk_data->hws[mux->id])) {
249 clk_data->hws[mux->id] = hw;
258 if (IS_ERR_OR_NULL(clk_data->hws[mux->id]))
261 mtk_clk_unregister_mux(clk_data->hws[mux->id]);
262 clk_data->hws[mux->id] = ERR_PTR(-ENOENT);
270 struct clk_hw_onecell_data *clk_data)
274 if (!clk_data)
280 if (IS_ERR_OR_NULL(clk_data->hws[mux->id]))
283 mtk_clk_unregister_mux(clk_data
216 mtk_clk_register_muxes(struct device *dev, const struct mtk_mux *muxes, int num, struct device_node *node, spinlock_t *lock, struct clk_hw_onecell_data *clk_data) argument
269 mtk_clk_unregister_muxes(const struct mtk_mux *muxes, int num, struct clk_hw_onecell_data *clk_data) argument
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H A Dclk-mt2701.c661 struct clk_hw_onecell_data *clk_data; local
669 clk_data = mtk_alloc_clk_data(CLK_TOP_NR);
670 if (!clk_data)
674 clk_data);
677 clk_data);
681 &mt2701_clk_lock, clk_data);
684 base, &mt2701_clk_lock, clk_data);
687 ARRAY_SIZE(top_clks), clk_data);
689 return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
889 struct clk_hw_onecell_data *clk_data; local
974 struct clk_hw_onecell_data *clk_data; local
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H A Dclk-gate.h55 struct clk_hw_onecell_data *clk_data);
58 struct clk_hw_onecell_data *clk_data);
H A Dclk-mt8183-apmixedsys.c145 struct clk_hw_onecell_data *clk_data; local
154 clk_data = mtk_devm_alloc_clk_data(dev, CLK_APMIXED_NR_CLK);
155 if (!clk_data)
158 ret = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
163 ARRAY_SIZE(apmixed_clks), clk_data);
167 ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
174 mtk_clk_unregister_gates(apmixed_clks, ARRAY_SIZE(apmixed_clks), clk_data);
176 mtk_clk_unregister_plls(plls, ARRAY_SIZE(plls), clk_data);
H A Dclk-pllfh.h74 struct clk_hw_onecell_data *clk_data);
78 struct clk_hw_onecell_data *clk_data);
H A Dclk-mt8365-apmixedsys.c110 struct clk_hw_onecell_data *clk_data; local
120 clk_data = mtk_devm_alloc_clk_data(dev, CLK_APMIXED_NR_CLK);
121 if (!clk_data)
128 clk_data->hws[CLK_APMIXED_UNIV_EN] = hw;
134 clk_data->hws[CLK_APMIXED_USB20_EN] = hw;
136 ret = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
140 ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
147 mtk_clk_unregister_plls(plls, ARRAY_SIZE(plls), clk_data);
H A Dclk-mt6765.c730 struct clk_hw_onecell_data *clk_data; local
739 clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK);
740 if (!clk_data)
743 mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
746 ARRAY_SIZE(apmixed_clks), clk_data);
747 r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
767 struct clk_hw_onecell_data *clk_data; local
773 clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK);
774 if (!clk_data)
778 clk_data);
804 struct clk_hw_onecell_data *clk_data; local
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/linux-master/drivers/clk/
H A Dclk-twl.c132 struct clk_hw_onecell_data *clk_data; local
144 clk_data = devm_kzalloc(&pdev->dev,
145 struct_size(clk_data, hws, count),
147 if (!clk_data)
150 clk_data->num = count;
165 clk_data->hws[i] = &cinfo[i].hw;
169 of_clk_hw_onecell_get, clk_data);
/linux-master/drivers/clk/microchip/
H A Dclk-mpfs.c365 struct mpfs_clock_data *clk_data; local
373 clk_data = devm_kzalloc(dev, struct_size(clk_data, hw_data.hws, num_clks), GFP_KERNEL);
374 if (!clk_data)
377 clk_data->base = devm_platform_ioremap_resource(pdev, 0);
378 if (IS_ERR(clk_data->base))
379 return PTR_ERR(clk_data->base);
381 clk_data->msspll_base = devm_platform_ioremap_resource(pdev, 1);
382 if (IS_ERR(clk_data->msspll_base))
383 return PTR_ERR(clk_data
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H A Dclk-mpfs-ccc.c232 struct mpfs_ccc_data *clk_data; local
240 clk_data = devm_kzalloc(&pdev->dev, struct_size(clk_data, hw_data.hws, num_clks),
242 if (!clk_data)
253 clk_data->pll_base = pll_base;
254 clk_data->hw_data.num = num_clks;
255 clk_data->dev = &pdev->dev;
257 ret = mpfs_ccc_register_plls(clk_data->dev, mpfs_ccc_pll_clks,
258 ARRAY_SIZE(mpfs_ccc_pll_clks), clk_data);
262 return devm_of_clk_add_hw_provider(clk_data
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/linux-master/drivers/clk/imx/
H A Dclk-imx8ulp.c148 struct clk_hw_onecell_data *clk_data; local
152 clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, IMX8ULP_CLK_CGC1_END),
154 if (!clk_data)
157 clk_data->num = IMX8ULP_CLK_CGC1_END;
158 clks = clk_data->hws;
224 imx_check_clk_hws(clks, clk_data->num);
226 return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, clk_data);
232 struct clk_hw_onecell_data *clk_data; local
236 clk_data
314 struct clk_hw_onecell_data *clk_data; local
397 struct clk_hw_onecell_data *clk_data; local
452 struct clk_hw_onecell_data *clk_data; local
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H A Dclk-imx1.c26 static struct clk_onecell_data clk_data; variable in typeref:struct:clk_onecell_data
68 clk_data.clks = clk;
69 clk_data.clk_num = ARRAY_SIZE(clk);
70 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
/linux-master/drivers/clk/hisilicon/
H A Dclk-hi3670.c827 struct hisi_clock_data *clk_data; local
836 clk_data = hisi_clk_init(np, nr);
837 if (!clk_data)
842 clk_data);
845 clk_data);
848 clk_data);
851 clk_data);
854 clk_data);
857 clk_data);
862 struct hisi_clock_data *clk_data; local
874 struct hisi_clock_data *clk_data; local
887 struct hisi_clock_data *clk_data; local
913 struct hisi_clock_data *clk_data; local
931 struct hisi_clock_data *clk_data; local
958 struct hisi_clock_data *clk_data; local
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H A Dclk-hi3660.c476 struct hisi_clock_data *clk_data; local
479 clk_data = hisi_clk_init(np, nr);
480 if (!clk_data)
485 clk_data);
490 struct hisi_clock_data *clk_data; local
493 clk_data = hisi_clk_init(np, nr);
494 if (!clk_data)
498 ARRAY_SIZE(hi3660_pmu_gate_clks), clk_data);
503 struct hisi_clock_data *clk_data; local
506 clk_data
515 struct hisi_clock_data *clk_data; local
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/linux-master/drivers/clk/sunxi/
H A Dclk-usb.c95 struct clk_onecell_data *clk_data; local
116 clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
117 if (!clk_data)
120 clk_data->clks = kcalloc(qty + 1, sizeof(struct clk *), GFP_KERNEL);
121 if (!clk_data->clks) {
122 kfree(clk_data);
130 clk_data->clks[i] = clk_register_gate(NULL, clk_name,
133 WARN_ON(IS_ERR(clk_data->clks[i]));
139 clk_data->clk_num = i;
141 of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
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/linux-master/drivers/gpu/drm/sun4i/
H A Dsun8i_tcon_top.h28 struct clk_hw_onecell_data *clk_data; member in struct:sun8i_tcon_top
/linux-master/drivers/clk/samsung/
H A Dclk-s5pv210-audss.c25 static struct clk_hw_onecell_data *clk_data; variable in typeref:struct:clk_hw_onecell_data
76 clk_data = devm_kzalloc(&pdev->dev,
77 struct_size(clk_data, hws, AUDSS_MAX_CLKS),
80 if (!clk_data)
83 clk_data->num = AUDSS_MAX_CLKS;
84 clk_table = clk_data->hws;
161 for (i = 0; i < clk_data->num; i++) {
170 clk_data);
183 for (i = 0; i < clk_data->num; i++) {
/linux-master/drivers/clk/bcm/
H A Dclk-iproc-asiu.c30 struct clk_hw_onecell_data *clk_data; member in struct:iproc_asiu
190 asiu->clk_data = kzalloc(struct_size(asiu->clk_data, hws, num_clks),
192 if (WARN_ON(!asiu->clk_data))
194 asiu->clk_data->num = num_clks;
235 asiu->clk_data->hws[i] = &asiu_clk->hw;
239 asiu->clk_data);
247 clk_hw_unregister(asiu->clk_data->hws[i]);
257 kfree(asiu->clk_data);
/linux-master/drivers/clk/ralink/
H A Dclk-mt7621.c155 struct clk_hw_onecell_data *clk_data,
158 struct clk_hw **hws = clk_data->hws;
201 struct clk_hw_onecell_data *clk_data)
203 struct clk_hw **hws = clk_data->hws;
318 struct clk_hw_onecell_data *clk_data,
321 struct clk_hw **hws = clk_data->hws;
354 struct clk_hw_onecell_data *clk_data; local
375 clk_data = kzalloc(struct_size(clk_data, hws, count), GFP_KERNEL);
376 if (!clk_data)
154 mt7621_register_gates(struct device *dev, struct clk_hw_onecell_data *clk_data, struct mt7621_clk_priv *priv) argument
200 mt7621_register_fixed_clocks(struct device *dev, struct clk_hw_onecell_data *clk_data) argument
317 mt7621_register_early_clocks(struct device_node *np, struct clk_hw_onecell_data *clk_data, struct mt7621_clk_priv *priv) argument
489 struct clk_hw_onecell_data *clk_data; local
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