Searched refs:CLK_SPI0 (Results 51 - 75 of 86) sorted by relevance

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/linux-master/include/dt-bindings/clock/
H A Drockchip,rv1126-cru.h32 #define CLK_SPI0 18 macro
H A Drockchip,rk3588-cru.h166 #define CLK_SPI0 151 macro
H A Drk3568-cru.h402 #define CLK_SPI0 338 macro
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Drockchip,rv1126-cru.h32 #define CLK_SPI0 18 macro
H A Drockchip,rk3588-cru.h166 #define CLK_SPI0 151 macro
H A Drk3568-cru.h402 #define CLK_SPI0 338 macro
/linux-master/drivers/clk/sunxi-ng/
H A Dccu-sun5i.c699 [CLK_SPI0] = &spi0_clk.common.hw,
832 [CLK_SPI0] = &spi0_clk.common.hw,
943 [CLK_SPI0] = &spi0_clk.common.hw,
H A Dccu-sun8i-v3s.c542 [CLK_SPI0] = &spi0_clk.common.hw,
623 [CLK_SPI0] = &spi0_clk.common.hw,
H A Dccu-sun8i-a23.c638 [CLK_SPI0] = &spi0_clk.common.hw,
H A Dccu-sun8i-h3.c726 [CLK_SPI0] = &spi0_clk.common.hw,
842 [CLK_SPI0] = &spi0_clk.common.hw,
H A Dccu-sun4i-a10.c1156 [CLK_SPI0] = &spi0_clk.common.hw,
1322 [CLK_SPI0] = &spi0_clk.common.hw,
H A Dccu-sun50i-a64.c824 [CLK_SPI0] = &spi0_clk.common.hw,
H A Dccu-sun8i-a83t.c765 [CLK_SPI0] = &spi0_clk.common.hw,
H A Dccu-sun8i-a33.c680 [CLK_SPI0] = &spi0_clk.common.hw,
H A Dccu-sun50i-h616.c934 [CLK_SPI0] = &spi0_clk.common.hw,
/linux-master/drivers/clk/pistachio/
H A Dclk-pistachio.c38 GATE(CLK_SPI0, "spi0", "spi0_div", 0x104, 19),
/linux-master/drivers/clk/microchip/
H A Dclk-mpfs.c319 CLK_PERIPH(CLK_SPI0, "clk_periph_spi0", PARENT_CLK(AHB), 10, 0),
/linux-master/drivers/clk/actions/
H A Dowl-s500.c508 [CLK_SPI0] = &spi0_clk.common.hw,
H A Dowl-s700.c546 [CLK_SPI0] = &clk_spi0.common.hw,
H A Dowl-s900.c641 [CLK_SPI0] = &spi0_clk.common.hw,
/linux-master/drivers/clk/samsung/
H A Dclk-s5pv210.c579 GATE(CLK_SPI0, "spi0", "dout_pclkp", CLK_GATE_IP3, 12, 0, 0),
H A Dclk-exynos5250.c591 GATE(CLK_SPI0, "spi0", "div_aclk66", GATE_IP_PERIC, 16, 0, 0),
H A Dclk-exynos3250.c659 GATE(CLK_SPI0, "spi0", "div_aclk_100", GATE_IP_PERIL, 16, 0, 0),
H A Dclk-exynos4.c880 GATE(CLK_SPI0, "spi0", "aclk100", GATE_IP_PERIL, 16,
/linux-master/drivers/clk/rockchip/
H A Dclk-rv1126.c333 COMPOSITE(CLK_SPI0, "clk_spi0", mux_gpll_xin24m_p, 0,

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