Searched refs:r0 (Results 51 - 54 of 54) sorted by relevance

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/haiku-fatelf/src/system/kernel/arch/ppc/
H A Darch_int.cpp83 dprintf("r0-r3: 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", frame->r0, frame->r1, frame->r2, frame->r3);
/haiku-fatelf/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_rate/sample/
H A Dsample.c453 KASSERT(rix0 == sched->r0, ("rix0 (%x) != sched->r0 (%x)!\n", rix0, sched->r0));
455 /* rix[0] = sched->r0; */
/haiku-fatelf/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar5212_reset.c2002 int16_t r13, r9, r7, r0; local
2119 r0 = rpow[0] = rpow[1] = rpow[2] = rpow[3] = rpow[4] = scaledPower;
2137 r0 = scaledPower;
2138 r7 = AH_MIN(r0, targetPowerOfdm.twicePwr54);
2141 *pMaxPower = r0;
/haiku-fatelf/src/bin/gdb/gdb/
H A Drs6000-tdep.c768 /* Rx must be scratch register r0. */
801 However, the compiler sometimes uses r0 to hold an argument. */
1177 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
1182 else if ((op & 0xffff0000) == 0x38000000 /* li r0, SIMM */
1195 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
1284 /* Store gen register S at (r31+r0).
1298 /* We know the contents of r0 from the previous
1750 0x800b0000, /* l r0,0x0(r11) */
1752 0x7c0903a6, /* mtctr r0 */
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