Searched refs:rdx (Results 26 - 50 of 237) sorted by relevance

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/haiku-buildtools/binutils/gas/testsuite/gas/i386/
H A Dx86-64-avx512cd_vl.d18 [ ]*[a-f0-9]+:[ ]*62 62 7d 08 c4 72 7f[ ]*vpconflictd 0x7f0\(%rdx\),%xmm30
19 [ ]*[a-f0-9]+:[ ]*62 62 7d 08 c4 b2 00 08 00 00[ ]*vpconflictd 0x800\(%rdx\),%xmm30
20 [ ]*[a-f0-9]+:[ ]*62 62 7d 08 c4 72 80[ ]*vpconflictd -0x800\(%rdx\),%xmm30
21 [ ]*[a-f0-9]+:[ ]*62 62 7d 08 c4 b2 f0 f7 ff ff[ ]*vpconflictd -0x810\(%rdx\),%xmm30
22 [ ]*[a-f0-9]+:[ ]*62 62 7d 18 c4 72 7f[ ]*vpconflictd 0x1fc\(%rdx\)\{1to4\},%xmm30
23 [ ]*[a-f0-9]+:[ ]*62 62 7d 18 c4 b2 00 02 00 00[ ]*vpconflictd 0x200\(%rdx\)\{1to4\},%xmm30
24 [ ]*[a-f0-9]+:[ ]*62 62 7d 18 c4 72 80[ ]*vpconflictd -0x200\(%rdx\)\{1to4\},%xmm30
25 [ ]*[a-f0-9]+:[ ]*62 62 7d 18 c4 b2 fc fd ff ff[ ]*vpconflictd -0x204\(%rdx\)\{1to4\},%xmm30
32 [ ]*[a-f0-9]+:[ ]*62 62 7d 28 c4 72 7f[ ]*vpconflictd 0xfe0\(%rdx\),%ymm30
33 [ ]*[a-f0-9]+:[ ]*62 62 7d 28 c4 b2 00 10 00 00[ ]*vpconflictd 0x1000\(%rdx\),
[all...]
H A Dx86-64-avx512f_vl-wig1.d17 [ ]*[a-f0-9]+:[ ]*62 62 fd 08 21 72 7f[ ]*vpmovsxbd 0x1fc\(%rdx\),%xmm30
18 [ ]*[a-f0-9]+:[ ]*62 62 fd 08 21 b2 00 02 00 00[ ]*vpmovsxbd 0x200\(%rdx\),%xmm30
19 [ ]*[a-f0-9]+:[ ]*62 62 fd 08 21 72 80[ ]*vpmovsxbd -0x200\(%rdx\),%xmm30
20 [ ]*[a-f0-9]+:[ ]*62 62 fd 08 21 b2 fc fd ff ff[ ]*vpmovsxbd -0x204\(%rdx\),%xmm30
26 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 21 72 7f[ ]*vpmovsxbd 0x3f8\(%rdx\),%ymm30
27 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 21 b2 00 04 00 00[ ]*vpmovsxbd 0x400\(%rdx\),%ymm30
28 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 21 72 80[ ]*vpmovsxbd -0x400\(%rdx\),%ymm30
29 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 21 b2 f8 fb ff ff[ ]*vpmovsxbd -0x408\(%rdx\),%ymm30
35 [ ]*[a-f0-9]+:[ ]*62 62 fd 08 22 72 7f[ ]*vpmovsxbq 0xfe\(%rdx\),%xmm30
36 [ ]*[a-f0-9]+:[ ]*62 62 fd 08 22 b2 00 01 00 00[ ]*vpmovsxbq 0x100\(%rdx\),
[all...]
H A Dx86-64-avx512ifma-intel.d18 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 72 7f[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\]
19 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 b2 00 20 00 00[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x2000\]
20 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 72 80[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rdx-0x2000\]
21 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 b2 c0 df ff ff[ ]*vpmadd52luq zmm30,zmm29,ZMMWORD PTR \[rdx-0x2040\]
22 [ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 72 7f[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rdx\+0x3f8\]\{1to8\}
23 [ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 b2 00 04 00 00[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rdx\+0x400\]\{1to8\}
24 [ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 72 80[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rdx-0x400\]\{1to8\}
25 [ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 b2 f8 fb ff ff[ ]*vpmadd52luq zmm30,zmm29,QWORD PTR \[rdx-0x408\]\{1to8\}
32 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 7f[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx\+0x1fc0\]
33 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 00 20 00 00[ ]*vpmadd52huq zmm30,zmm29,ZMMWORD PTR \[rdx\
[all...]
H A Dx86-64-avx512ifma.d18 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 72 7f[ ]*vpmadd52luq 0x1fc0\(%rdx\),%zmm29,%zmm30
19 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 b2 00 20 00 00[ ]*vpmadd52luq 0x2000\(%rdx\),%zmm29,%zmm30
20 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 72 80[ ]*vpmadd52luq -0x2000\(%rdx\),%zmm29,%zmm30
21 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b4 b2 c0 df ff ff[ ]*vpmadd52luq -0x2040\(%rdx\),%zmm29,%zmm30
22 [ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 72 7f[ ]*vpmadd52luq 0x3f8\(%rdx\)\{1to8\},%zmm29,%zmm30
23 [ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%rdx\)\{1to8\},%zmm29,%zmm30
24 [ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 72 80[ ]*vpmadd52luq -0x400\(%rdx\)\{1to8\},%zmm29,%zmm30
25 [ ]*[a-f0-9]+:[ ]*62 62 95 50 b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%rdx\)\{1to8\},%zmm29,%zmm30
32 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 72 7f[ ]*vpmadd52huq 0x1fc0\(%rdx\),%zmm29,%zmm30
33 [ ]*[a-f0-9]+:[ ]*62 62 95 40 b5 b2 00 20 00 00[ ]*vpmadd52huq 0x2000\(%rdx\),
[all...]
H A Dx86-64-avx512ifma_vl.s12 vpmadd52luq 2032(%rdx), %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8
13 vpmadd52luq 2048(%rdx), %xmm29, %xmm30 # AVX512{IFMA,VL}
14 vpmadd52luq -2048(%rdx), %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8
15 vpmadd52luq -2064(%rdx), %xmm29, %xmm30 # AVX512{IFMA,VL}
16 vpmadd52luq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8
17 vpmadd52luq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL}
18 vpmadd52luq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL} Disp8
19 vpmadd52luq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{IFMA,VL}
26 vpmadd52luq 4064(%rdx), %ymm29, %ymm30 # AVX512{IFMA,VL} Disp8
27 vpmadd52luq 4096(%rdx),
[all...]
H A Dx86-64-avx512_vpopcntdq-intel.d18 [ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 72 7f[ ]*vpopcntd zmm30,ZMMWORD PTR \[rdx\+0x1fc0\]
19 [ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 b2 00 20 00 00[ ]*vpopcntd zmm30,ZMMWORD PTR \[rdx\+0x2000\]
20 [ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 72 80[ ]*vpopcntd zmm30,ZMMWORD PTR \[rdx-0x2000\]
21 [ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 b2 c0 df ff ff[ ]*vpopcntd zmm30,ZMMWORD PTR \[rdx-0x2040\]
22 [ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 72 7f[ ]*vpopcntd zmm30,DWORD PTR \[rdx\+0x1fc\]\{1to16\}
23 [ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 b2 00 02 00 00[ ]*vpopcntd zmm30,DWORD PTR \[rdx\+0x200\]\{1to16\}
24 [ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 72 80[ ]*vpopcntd zmm30,DWORD PTR \[rdx-0x200\]\{1to16\}
25 [ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 b2 fc fd ff ff[ ]*vpopcntd zmm30,DWORD PTR \[rdx-0x204\]\{1to16\}
32 [ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 72 7f[ ]*vpopcntq zmm30,ZMMWORD PTR \[rdx\+0x1fc0\]
33 [ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 b2 00 20 00 00[ ]*vpopcntq zmm30,ZMMWORD PTR \[rdx\
[all...]
H A Dx86-64-avx512_vpopcntdq.d18 [ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 72 7f[ ]*vpopcntd 0x1fc0\(%rdx\),%zmm30
19 [ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 b2 00 20 00 00[ ]*vpopcntd 0x2000\(%rdx\),%zmm30
20 [ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 72 80[ ]*vpopcntd -0x2000\(%rdx\),%zmm30
21 [ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 b2 c0 df ff ff[ ]*vpopcntd -0x2040\(%rdx\),%zmm30
22 [ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 72 7f[ ]*vpopcntd 0x1fc\(%rdx\)\{1to16\},%zmm30
23 [ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 b2 00 02 00 00[ ]*vpopcntd 0x200\(%rdx\)\{1to16\},%zmm30
24 [ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 72 80[ ]*vpopcntd -0x200\(%rdx\)\{1to16\},%zmm30
25 [ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 b2 fc fd ff ff[ ]*vpopcntd -0x204\(%rdx\)\{1to16\},%zmm30
32 [ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 72 7f[ ]*vpopcntq 0x1fc0\(%rdx\),%zmm30
33 [ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 b2 00 20 00 00[ ]*vpopcntq 0x2000\(%rdx\),
[all...]
H A Dx86-64-avx512_4vnniw.s10 vp4dpwssd 4064(%rdx), %zmm8, %zmm1 # AVX512_4VNNIW Disp8
11 vp4dpwssd 4096(%rdx), %zmm8, %zmm1 # AVX512_4VNNIW
12 vp4dpwssd -4096(%rdx), %zmm8, %zmm1 # AVX512_4VNNIW Disp8
13 vp4dpwssd -4128(%rdx), %zmm8, %zmm1 # AVX512_4VNNIW
18 vp4dpwssds 4064(%rdx), %zmm8, %zmm1 # AVX512_4VNNIW Disp8
19 vp4dpwssds 4096(%rdx), %zmm8, %zmm1 # AVX512_4VNNIW
20 vp4dpwssds -4096(%rdx), %zmm8, %zmm1 # AVX512_4VNNIW Disp8
21 vp4dpwssds -4128(%rdx), %zmm8, %zmm1 # AVX512_4VNNIW
29 vp4dpwssd zmm1, zmm8, XMMWORD PTR [rdx+4064] # AVX512_4VNNIW Disp8
30 vp4dpwssd zmm1, zmm8, XMMWORD PTR [rdx
[all...]
H A Dx86-64-adx.s14 adcx -654321(%esp,%esi,8), %rdx
16 adcxq %rdx, %rcx
28 adox -654321(%esp,%esi,8), %rdx
30 adoxq %rdx, %rcx
41 adcx rdx, r9
42 adcx rdx, QWORD PTR [rsp+rsi*8-123456]
51 adox rdx, r9
52 adox rdx, QWORD PTR [rsp+rsi*8-123456]
H A Dx86-64-avx512cd-intel.d18 [ ]*[a-f0-9]+: 62 62 7d 48 c4 72 7f vpconflictd zmm30,ZMMWORD PTR \[rdx\+0x1fc0\]
19 [ ]*[a-f0-9]+: 62 62 7d 48 c4 b2 00 20 00 00 vpconflictd zmm30,ZMMWORD PTR \[rdx\+0x2000\]
20 [ ]*[a-f0-9]+: 62 62 7d 48 c4 72 80 vpconflictd zmm30,ZMMWORD PTR \[rdx-0x2000\]
21 [ ]*[a-f0-9]+: 62 62 7d 48 c4 b2 c0 df ff ff vpconflictd zmm30,ZMMWORD PTR \[rdx-0x2040\]
22 [ ]*[a-f0-9]+: 62 62 7d 58 c4 72 7f vpconflictd zmm30,DWORD PTR \[rdx\+0x1fc\]\{1to16\}
23 [ ]*[a-f0-9]+: 62 62 7d 58 c4 b2 00 02 00 00 vpconflictd zmm30,DWORD PTR \[rdx\+0x200\]\{1to16\}
24 [ ]*[a-f0-9]+: 62 62 7d 58 c4 72 80 vpconflictd zmm30,DWORD PTR \[rdx-0x200\]\{1to16\}
25 [ ]*[a-f0-9]+: 62 62 7d 58 c4 b2 fc fd ff ff vpconflictd zmm30,DWORD PTR \[rdx-0x204\]\{1to16\}
32 [ ]*[a-f0-9]+: 62 62 fd 48 c4 72 7f vpconflictq zmm30,ZMMWORD PTR \[rdx\+0x1fc0\]
33 [ ]*[a-f0-9]+: 62 62 fd 48 c4 b2 00 20 00 00 vpconflictq zmm30,ZMMWORD PTR \[rdx\
[all...]
H A Dx86-64-avx512cd.d17 [ ]*[a-f0-9]+: 62 62 7d 48 c4 72 7f vpconflictd 0x1fc0\(%rdx\),%zmm30
18 [ ]*[a-f0-9]+: 62 62 7d 48 c4 b2 00 20 00 00 vpconflictd 0x2000\(%rdx\),%zmm30
19 [ ]*[a-f0-9]+: 62 62 7d 48 c4 72 80 vpconflictd -0x2000\(%rdx\),%zmm30
20 [ ]*[a-f0-9]+: 62 62 7d 48 c4 b2 c0 df ff ff vpconflictd -0x2040\(%rdx\),%zmm30
21 [ ]*[a-f0-9]+: 62 62 7d 58 c4 72 7f vpconflictd 0x1fc\(%rdx\)\{1to16\},%zmm30
22 [ ]*[a-f0-9]+: 62 62 7d 58 c4 b2 00 02 00 00 vpconflictd 0x200\(%rdx\)\{1to16\},%zmm30
23 [ ]*[a-f0-9]+: 62 62 7d 58 c4 72 80 vpconflictd -0x200\(%rdx\)\{1to16\},%zmm30
24 [ ]*[a-f0-9]+: 62 62 7d 58 c4 b2 fc fd ff ff vpconflictd -0x204\(%rdx\)\{1to16\},%zmm30
31 [ ]*[a-f0-9]+: 62 62 fd 48 c4 72 7f vpconflictq 0x1fc0\(%rdx\),%zmm30
32 [ ]*[a-f0-9]+: 62 62 fd 48 c4 b2 00 20 00 00 vpconflictq 0x2000\(%rdx\),
[all...]
H A Dx86-64-avx512f_vl-wig.s11 vpmovsxbd 508(%rdx), %xmm30 # AVX512{F,VL} Disp8
12 vpmovsxbd 512(%rdx), %xmm30 # AVX512{F,VL}
13 vpmovsxbd -512(%rdx), %xmm30 # AVX512{F,VL} Disp8
14 vpmovsxbd -516(%rdx), %xmm30 # AVX512{F,VL}
20 vpmovsxbd 1016(%rdx), %ymm30 # AVX512{F,VL} Disp8
21 vpmovsxbd 1024(%rdx), %ymm30 # AVX512{F,VL}
22 vpmovsxbd -1024(%rdx), %ymm30 # AVX512{F,VL} Disp8
23 vpmovsxbd -1032(%rdx), %ymm30 # AVX512{F,VL}
29 vpmovsxbq 254(%rdx), %xmm30 # AVX512{F,VL} Disp8
30 vpmovsxbq 256(%rdx),
[all...]
H A Dx86-64-avx512ifma_vl-intel.d18 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 72 7f[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
19 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 b2 00 08 00 00[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rdx\+0x800\]
20 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 72 80[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rdx-0x800\]
21 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 b2 f0 f7 ff ff[ ]*vpmadd52luq xmm30,xmm29,XMMWORD PTR \[rdx-0x810\]
22 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 7f[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx\+0x3f8\]\{1to2\}
23 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 00 04 00 00[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx\+0x400\]\{1to2\}
24 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 80[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx-0x400\]\{1to2\}
25 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 f8 fb ff ff[ ]*vpmadd52luq xmm30,xmm29,QWORD PTR \[rdx-0x408\]\{1to2\}
32 [ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 72 7f[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
33 [ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 b2 00 10 00 00[ ]*vpmadd52luq ymm30,ymm29,YMMWORD PTR \[rdx\
[all...]
H A Dx86-64-avx512ifma_vl.d18 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 72 7f[ ]*vpmadd52luq 0x7f0\(%rdx\),%xmm29,%xmm30
19 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 b2 00 08 00 00[ ]*vpmadd52luq 0x800\(%rdx\),%xmm29,%xmm30
20 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 72 80[ ]*vpmadd52luq -0x800\(%rdx\),%xmm29,%xmm30
21 [ ]*[a-f0-9]+:[ ]*62 62 95 00 b4 b2 f0 f7 ff ff[ ]*vpmadd52luq -0x810\(%rdx\),%xmm29,%xmm30
22 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 7f[ ]*vpmadd52luq 0x3f8\(%rdx\)\{1to2\},%xmm29,%xmm30
23 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 00 04 00 00[ ]*vpmadd52luq 0x400\(%rdx\)\{1to2\},%xmm29,%xmm30
24 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 72 80[ ]*vpmadd52luq -0x400\(%rdx\)\{1to2\},%xmm29,%xmm30
25 [ ]*[a-f0-9]+:[ ]*62 62 95 10 b4 b2 f8 fb ff ff[ ]*vpmadd52luq -0x408\(%rdx\)\{1to2\},%xmm29,%xmm30
32 [ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 72 7f[ ]*vpmadd52luq 0xfe0\(%rdx\),%ymm29,%ymm30
33 [ ]*[a-f0-9]+:[ ]*62 62 95 20 b4 b2 00 10 00 00[ ]*vpmadd52luq 0x1000\(%rdx\),
[all...]
H A Dx86-64-avx512_4fmaps_vl.s10 v4fmaddps 4064(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} Disp8
11 v4fmaddps 4096(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL}
12 v4fmaddps -4096(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} Disp8
13 v4fmaddps -4128(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL}
18 v4fmaddps 4064(%rdx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} Disp8
19 v4fmaddps 4096(%rdx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL}
20 v4fmaddps -4096(%rdx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL} Disp8
21 v4fmaddps -4128(%rdx), %ymm8, %ymm1 # AVX512{_4FMAPS,VL}
26 v4fnmaddps 4064(%rdx), %xmm8, %xmm1 # AVX512{_4FMAPS,VL} Disp8
27 v4fnmaddps 4096(%rdx),
[all...]
H A Dx86-64-avx512_4vnniw_vl.s10 vp4dpwssd 4064(%rdx), %xmm8, %xmm1 # AVX512{_4VNNIW,VL} Disp8
11 vp4dpwssd 4096(%rdx), %xmm8, %xmm1 # AVX512{_4VNNIW,VL}
12 vp4dpwssd -4096(%rdx), %xmm8, %xmm1 # AVX512{_4VNNIW,VL} Disp8
13 vp4dpwssd -4128(%rdx), %xmm8, %xmm1 # AVX512{_4VNNIW,VL}
18 vp4dpwssd 4064(%rdx), %ymm8, %ymm1 # AVX512{_4VNNIW,VL} Disp8
19 vp4dpwssd 4096(%rdx), %ymm8, %ymm1 # AVX512{_4VNNIW,VL}
20 vp4dpwssd -4096(%rdx), %ymm8, %ymm1 # AVX512{_4VNNIW,VL} Disp8
21 vp4dpwssd -4128(%rdx), %ymm8, %ymm1 # AVX512{_4VNNIW,VL}
26 vp4dpwssds 4064(%rdx), %xmm8, %xmm1 # AVX512{_4VNNIW,VL} Disp8
27 vp4dpwssds 4096(%rdx),
[all...]
H A Dx86-64-mwaitx-bdver4.d12 [ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
13 [ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx
14 [ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
H A Dx86-64-avx512bw_vl.d17 [ ]*[a-f0-9]+:[ ]*62 62 7d 08 1c 72 7f[ ]*vpabsb 0x7f0\(%rdx\),%xmm30
18 [ ]*[a-f0-9]+:[ ]*62 62 7d 08 1c b2 00 08 00 00[ ]*vpabsb 0x800\(%rdx\),%xmm30
19 [ ]*[a-f0-9]+:[ ]*62 62 7d 08 1c 72 80[ ]*vpabsb -0x800\(%rdx\),%xmm30
20 [ ]*[a-f0-9]+:[ ]*62 62 7d 08 1c b2 f0 f7 ff ff[ ]*vpabsb -0x810\(%rdx\),%xmm30
26 [ ]*[a-f0-9]+:[ ]*62 62 7d 28 1c 72 7f[ ]*vpabsb 0xfe0\(%rdx\),%ymm30
27 [ ]*[a-f0-9]+:[ ]*62 62 7d 28 1c b2 00 10 00 00[ ]*vpabsb 0x1000\(%rdx\),%ymm30
28 [ ]*[a-f0-9]+:[ ]*62 62 7d 28 1c 72 80[ ]*vpabsb -0x1000\(%rdx\),%ymm30
29 [ ]*[a-f0-9]+:[ ]*62 62 7d 28 1c b2 e0 ef ff ff[ ]*vpabsb -0x1020\(%rdx\),%ymm30
35 [ ]*[a-f0-9]+:[ ]*62 62 7d 08 1d 72 7f[ ]*vpabsw 0x7f0\(%rdx\),%xmm30
36 [ ]*[a-f0-9]+:[ ]*62 62 7d 08 1d b2 00 08 00 00[ ]*vpabsw 0x800\(%rdx\),
[all...]
H A Dx86-64-avx512bw-wig1.d17 [ ]*[a-f0-9]+:[ ]*62 62 fd 48 1c 72 7f[ ]*vpabsb 0x1fc0\(%rdx\),%zmm30
18 [ ]*[a-f0-9]+:[ ]*62 62 fd 48 1c b2 00 20 00 00[ ]*vpabsb 0x2000\(%rdx\),%zmm30
19 [ ]*[a-f0-9]+:[ ]*62 62 fd 48 1c 72 80[ ]*vpabsb -0x2000\(%rdx\),%zmm30
20 [ ]*[a-f0-9]+:[ ]*62 62 fd 48 1c b2 c0 df ff ff[ ]*vpabsb -0x2040\(%rdx\),%zmm30
26 [ ]*[a-f0-9]+:[ ]*62 62 fd 48 1d 72 7f[ ]*vpabsw 0x1fc0\(%rdx\),%zmm30
27 [ ]*[a-f0-9]+:[ ]*62 62 fd 48 1d b2 00 20 00 00[ ]*vpabsw 0x2000\(%rdx\),%zmm30
28 [ ]*[a-f0-9]+:[ ]*62 62 fd 48 1d 72 80[ ]*vpabsw -0x2000\(%rdx\),%zmm30
29 [ ]*[a-f0-9]+:[ ]*62 62 fd 48 1d b2 c0 df ff ff[ ]*vpabsw -0x2040\(%rdx\),%zmm30
35 [ ]*[a-f0-9]+:[ ]*62 61 95 40 63 72 7f[ ]*vpacksswb 0x1fc0\(%rdx\),%zmm29,%zmm30
36 [ ]*[a-f0-9]+:[ ]*62 61 95 40 63 b2 00 20 00 00[ ]*vpacksswb 0x2000\(%rdx\),
[all...]
H A Dx86-64-avx512dq_vl-intel.d16 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 1a 72 7f[ ]*vbroadcastf64x2 ymm30,XMMWORD PTR \[rdx\+0x7f0\]
17 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 1a b2 00 08 00 00[ ]*vbroadcastf64x2 ymm30,XMMWORD PTR \[rdx\+0x800\]
18 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 1a 72 80[ ]*vbroadcastf64x2 ymm30,XMMWORD PTR \[rdx-0x800\]
19 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 1a b2 f0 f7 ff ff[ ]*vbroadcastf64x2 ymm30,XMMWORD PTR \[rdx-0x810\]
24 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 5a 72 7f[ ]*vbroadcasti64x2 ymm30,XMMWORD PTR \[rdx\+0x7f0\]
25 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 5a b2 00 08 00 00[ ]*vbroadcasti64x2 ymm30,XMMWORD PTR \[rdx\+0x800\]
26 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 5a 72 80[ ]*vbroadcasti64x2 ymm30,XMMWORD PTR \[rdx-0x800\]
27 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 5a b2 f0 f7 ff ff[ ]*vbroadcasti64x2 ymm30,XMMWORD PTR \[rdx-0x810\]
33 [ ]*[a-f0-9]+:[ ]*62 62 7d 28 19 72 7f[ ]*vbroadcastf32x2 ymm30,QWORD PTR \[rdx\+0x3f8\]
34 [ ]*[a-f0-9]+:[ ]*62 62 7d 28 19 b2 00 04 00 00[ ]*vbroadcastf32x2 ymm30,QWORD PTR \[rdx\
[all...]
H A Dx86-64-avx512dq_vl.d16 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 1a 72 7f[ ]*vbroadcastf64x2 0x7f0\(%rdx\),%ymm30
17 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 1a b2 00 08 00 00[ ]*vbroadcastf64x2 0x800\(%rdx\),%ymm30
18 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 1a 72 80[ ]*vbroadcastf64x2 -0x800\(%rdx\),%ymm30
19 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 1a b2 f0 f7 ff ff[ ]*vbroadcastf64x2 -0x810\(%rdx\),%ymm30
24 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 5a 72 7f[ ]*vbroadcasti64x2 0x7f0\(%rdx\),%ymm30
25 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 5a b2 00 08 00 00[ ]*vbroadcasti64x2 0x800\(%rdx\),%ymm30
26 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 5a 72 80[ ]*vbroadcasti64x2 -0x800\(%rdx\),%ymm30
27 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 5a b2 f0 f7 ff ff[ ]*vbroadcasti64x2 -0x810\(%rdx\),%ymm30
33 [ ]*[a-f0-9]+:[ ]*62 62 7d 28 19 72 7f[ ]*vbroadcastf32x2 0x3f8\(%rdx\),%ymm30
34 [ ]*[a-f0-9]+:[ ]*62 62 7d 28 19 b2 00 04 00 00[ ]*vbroadcastf32x2 0x400\(%rdx\),
[all...]
/haiku-buildtools/binutils/ld/testsuite/ld-x86-64/
H A Dpr20800b.S9 leaq .L2(%rip), %rdx
14 addq %r11, %rdx
16 leaq (%rdx,%rax), %rdi
17 addq %rdx, %rcx
H A Dpr20253-2b.S16 movq func1_p@GOTPCREL(%rip), %rdx
18 cmpq %rax, (%rdx)
20 cmpl %eax, (%rdx)
30 movq func2_p@GOTPCREL(%rip), %rdx
32 cmpq %rax, (%rdx)
34 cmpl %eax, (%rdx)
/haiku-buildtools/gcc/zlib/contrib/amd64/
H A Damd64-match.S269 mov $(-MAX_MATCH_8), %rdx
275 prefetcht1 (%windowbestlen, %rdx)
276 prefetcht1 (%prev, %rdx)
280 * adjust %rdx so that it is offset to the exact byte that mismatched.
293 movdqu (%windowbestlen, %rdx), %xmm1
294 movdqu (%prev, %rdx), %xmm2
296 movdqu 16(%windowbestlen, %rdx), %xmm3
297 movdqu 16(%prev, %rdx), %xmm4
299 movdqu 32(%windowbestlen, %rdx), %xmm5
300 movdqu 32(%prev, %rdx),
[all...]
/haiku-buildtools/binutils/zlib/contrib/amd64/
H A Damd64-match.S269 mov $(-MAX_MATCH_8), %rdx
275 prefetcht1 (%windowbestlen, %rdx)
276 prefetcht1 (%prev, %rdx)
280 * adjust %rdx so that it is offset to the exact byte that mismatched.
293 movdqu (%windowbestlen, %rdx), %xmm1
294 movdqu (%prev, %rdx), %xmm2
296 movdqu 16(%windowbestlen, %rdx), %xmm3
297 movdqu 16(%prev, %rdx), %xmm4
299 movdqu 32(%windowbestlen, %rdx), %xmm5
300 movdqu 32(%prev, %rdx),
[all...]

Completed in 142 milliseconds

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