/haiku/src/add-ons/accelerants/nvidia/engine/ |
H A D | nv_bes.c | 24 * si->dm.h_display_start and si->dm.v_display_start determine where the new 31 if (!si->overlay.active) return; 45 if (si->ps.secondary_head) 47 switch (si->dm.flags & DUALHEAD_BITS) 51 if ((si->overlay.ow.h_start + (si->overlay.ow.width / 2)) < 52 (si->dm.h_display_start + si->dm.timing.h_display)) 53 nv_bes_to_crtc(si [all...] |
H A D | nv_acc_dma.c | 48 while ((NV_REG32(NVACC_FIFO + NV_GENERAL_DMAGET) != (si->engine.dma.put << 2)) && 99 if (si->ps.card_arch < NV20A) 112 //ACCW(PT_NUMERATOR, (si->ps.std_engine_clock * 20)); 131 if (si->ps.card_arch == NV04A) 139 if ((si->ps.card_type <= NV40) || (si->ps.card_type == NV45)) 149 ACCW(NV10_FBTIL0ED, (si->ps.memory_size - 1)); 150 ACCW(NV10_FBTIL1ED, (si->ps.memory_size - 1)); 151 ACCW(NV10_FBTIL2ED, (si->ps.memory_size - 1)); 152 ACCW(NV10_FBTIL3ED, (si [all...] |
H A D | nv_dac2.c | 20 switch(si->ps.card_type) { 89 r = si->color_data; 165 if (si->ps.monitors & CRTC2_TMDS) 170 target.timing.pixel_clock = si->ps.p2_timing.pixel_clock; 192 if (si->ps.card_arch >= NV30A) 200 if ((si->ps.monitors & CRTC2_TMDS) && !si->settings.pgm_panel) { 209 if (si->ps.ext_pll) DAC2W(PIXPLLC2, 0x80000401); 221 if (si->ps.card_arch < NV40A) { 246 if (si [all...] |
/haiku/src/add-ons/accelerants/3dfx/ |
H A D | mode.cpp | 47 SharedInfo& si = *gInfo.sharedInfo; local 58 if (mode->timing.pixel_clock > si.maxPixelClock) 64 for (uint32 j = 0; j < si.colorSpaceCount; j++) { 65 if (mode->space == uint32(si.colorSpaces[j])) { 77 if ((mode->timing.pixel_clock > si.maxPixelClock / 2) 94 SharedInfo& si = *gInfo.sharedInfo; local 101 si.bHaveEDID = TDFX_GetEdidInfo(si.edidInfo); 103 if (si.bHaveEDID) { 105 edid_dump(&(si 138 SharedInfo& si = *gInfo.sharedInfo; local 175 SharedInfo& si = *gInfo.sharedInfo; local 280 SharedInfo& si = *gInfo.sharedInfo; local 298 SharedInfo& si = *gInfo.sharedInfo; local 336 SharedInfo& si = *gInfo.sharedInfo; local [all...] |
H A D | overlay.cpp | 50 SharedInfo& si = *gInfo.sharedInfo; local 55 si.overlayLock.Acquire(); 71 si.overlayLock.Release(); 89 if (si.chipType == VOODOO_5) 92 OverlayBuffer* ovBuff = si.overlayBuffer; 98 addr_t prevBuffAddr = si.videoMemAddr + si.frameBufferOffset 99 + si.maxFrameBufferSize; 124 addr_t fbEndAddr = si.videoMemAddr + si 169 SharedInfo& si = *gInfo.sharedInfo; local 256 SharedInfo& si = *gInfo.sharedInfo; local 276 SharedInfo& si = *gInfo.sharedInfo; local 296 SharedInfo& si = *gInfo.sharedInfo; local [all...] |
H A D | cursor.cpp | 25 SharedInfo& si = *gInfo.sharedInfo; local 26 si.cursorHotX = hot_x; 27 si.cursorHotY = hot_y; 47 SharedInfo& si = *gInfo.sharedInfo; local 48 DisplayModeEx& dm = si.displayMode; 75 x -= (hds + si.cursorHotX); 76 y -= (vds + si.cursorHotY);
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/haiku/src/add-ons/accelerants/ati/ |
H A D | overlay.cpp | 50 SharedInfo& si = *gInfo.sharedInfo; local 57 if (MACH64_FAMILY(si.chipType)) { 59 || (width > 384 && si.chipType < MACH64_264VTB) 60 || (width > 720 && (si.chipType < MACH64_264GTPRO 61 || si.chipType > MACH64_264LTPRO))) 65 si.overlayLock.Acquire(); 74 si.overlayLock.Release(); 85 OverlayBuffer* ovBuff = si.overlayBuffer; 94 addr_t prevBuffAddr = (si.videoMemAddr + si 165 SharedInfo& si = *gInfo.sharedInfo; local 248 SharedInfo& si = *gInfo.sharedInfo; local 265 SharedInfo& si = *gInfo.sharedInfo; local 286 SharedInfo& si = *gInfo.sharedInfo; local [all...] |
H A D | cursor.cpp | 25 SharedInfo& si = *gInfo.sharedInfo; local 26 si.cursorHotX = hot_x; 27 si.cursorHotY = hot_y; 47 SharedInfo& si = *gInfo.sharedInfo; local 48 DisplayModeEx& dm = si.displayMode; 75 x -= (hds + si.cursorHotX); 76 y -= (vds + si.cursorHotY);
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H A D | rage128_cursor.cpp | 33 SharedInfo& si = *gInfo.sharedInfo; local 52 OUTREG(R128_CUR_OFFSET, si.cursorOffset + yOffset * 16); 59 SharedInfo& si = *gInfo.sharedInfo; local 66 uint32* fbCursor32 = (uint32*)((addr_t)si.videoMemAddr + si.cursorOffset); 84 uint8* fbCursor = (uint8*)((addr_t)si.videoMemAddr + si.cursorOffset);
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/haiku/src/add-ons/accelerants/matrox/engine/ |
H A D | mga_acc.c | 22 if (si->engine.y_lin) { \ 23 ACCW(YDST,((dst)* (si->fbc.bytes_per_row / (si->engine.depth >> 3))) >> 5); \ 47 if ((si->ps.card_type >= G450) && (si->ps.pins_status == B_OK)) 50 maccess |= ((((uint32)si->ps.v5_mem_type) & 0x80) >> 1); 54 si->engine.y_lin = 0x00; 56 si->engine.depth = 0; 65 switch(si->dm.space) 69 si [all...] |
H A D | mga_globals.h | 2 extern shared_info *si;
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H A D | mga_general.c | 21 #define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \ 60 if (si->ps.int_assigned) 72 sprintf(si->adi.name, "Matrox Mystique PCI"); 73 sprintf(si->adi.chipset, "MGA-1064"); 77 si->ps.card_type = MIL1; 78 sprintf(si->adi.name, "Matrox Millennium I"); 79 sprintf(si->adi.chipset, "MGA-2064"); 83 si->ps.card_type = MIL2; 84 sprintf(si->adi.name, "Matrox Millennium II"); 85 sprintf(si [all...] |
H A D | mga_bes.c | 25 * si->dm.h_display_start and si->dm.v_display_start determine where the new 32 if (!si->overlay.active) return; 47 crtc_hstart = si->dm.h_display_start; 49 if (si->switched_crtcs) 51 crtc_hstart += si->dm.timing.h_display; 54 crtc_hend = crtc_hstart + si->dm.timing.h_display; 55 crtc_vstart = si->dm.v_display_start; 57 crtc_vend = crtc_vstart + si->dm.timing.v_display; 68 if (si [all...] |
/haiku/src/add-ons/accelerants/matrox/ |
H A D | global.h | 2 extern shared_info *si;
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/haiku/src/add-ons/accelerants/nvidia/ |
H A D | EngineManagment.c | 33 AQUIRE_BEN(si->engine.lock) 38 if (!si->settings.block_acc) nv_acc_assert_fifo(); 48 AQUIRE_BEN(si->engine.lock) 53 if (!si->settings.block_acc) nv_acc_assert_fifo_dma(); 66 RELEASE_BEN(si->engine.lock) 73 if (si->settings.block_acc) return; 76 if (!si->settings.dma_acc) 86 st->counter = si->engine.count;
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/haiku/src/add-ons/accelerants/s3/ |
H A D | hooks.cpp | 17 SharedInfo& si = *gInfo.sharedInfo; local 52 return (void*)(si.bDisableHdwCursor ? NULL : SetCursorShape); 54 return (void*)(si.bDisableHdwCursor ? NULL : MoveCursor); 56 return (void*)(si.bDisableHdwCursor ? NULL : gInfo.ShowCursor); 68 return (void*)(si.bDisableAccelDraw ? NULL : gInfo.ScreenToScreenBlit); 70 return (void*)(si.bDisableAccelDraw ? NULL : gInfo.FillRectangle); 72 return (void*)(si.bDisableAccelDraw ? NULL : gInfo.InvertRectangle); 74 return (void*)(si.bDisableAccelDraw ? NULL : gInfo.FillSpan);
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H A D | savage_cursor.cpp | 47 SharedInfo& si = *gInfo.sharedInfo; local 49 if (S3_SAVAGE4_SERIES(si.chipType)) 85 SharedInfo& si = *gInfo.sharedInfo; local 92 uint16* fbCursor16 = (uint16*)((addr_t)si.videoMemAddr + si.cursorOffset); 108 uint8* fbCursor = (uint8*)((addr_t)si.videoMemAddr + si.cursorOffset); 117 if (S3_SAVAGE4_SERIES(si.chipType)) { 128 WriteCrtcReg(0x4d, (0xff & si.cursorOffset / 1024)); 129 WriteCrtcReg(0x4c, (0xff00 & si [all...] |
/haiku/src/add-ons/accelerants/via/ |
H A D | SetDisplayMode.c | 86 // if (si->ps.secondary_head) head2_dpms(false, false, false); 89 startadd = (uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer; 92 eng_general_validate_pic_size (&target, &si->fbc.bytes_per_row, &si->acc_mode); 202 si->interlaced_tv_mode = false; 203 /* if ((target2.flags & TV_BITS) && (si->ps.card_type >= G450)) 204 si->interlaced_tv_mode = true; 209 //we need a secondary si->fbc! 235 // if (si [all...] |
/haiku/src/add-ons/accelerants/et6x00/ |
H A D | InitAccelerant.c | 34 sharedInfoArea = clone_area("ET6000 shared info", (void **)&si, 41 mmRegs = si->mmRegs; 53 si = 0; 92 si->fbc.frame_buffer = si->framebuffer; 93 si->fbc.frame_buffer_dma = si->physFramebuffer; 96 INIT_BEN(si->engine.lock); 101 si->engine.lastIdle = si [all...] |
H A D | EngineManagment.c | 23 AQUIRE_BEN(si->engine.lock) 36 st->counter = si->engine.count; 40 RELEASE_BEN(si->engine.lock) 47 si->engine.lastIdle = si->engine.count; 52 st->counter = si->engine.count; 58 si->engine.lastIdle = st->counter;
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/haiku/src/add-ons/accelerants/skeleton/engine/ |
H A D | dac2.c | 78 r = si->color_data; 157 if (si->ps.tmds2_active && !si->settings.pgm_panel) 166 if (si->ps.tmds2_active) 171 target.timing.pixel_clock = si->ps.p2_timing.pixel_clock; 192 if (si->ps.ext_pll) DAC2W(PIXPLLC2, 0x80000401); 221 switch (si->ps.card_type) { 239 /* switch(si->ps.card_type) 261 max_pclk = si->ps.max_dac2_clock_8; 265 max_pclk = si [all...] |
H A D | dac.c | 70 r = si->color_data; 149 if (si->ps.tmds1_active && !si->settings.pgm_panel) 158 if (si->ps.tmds1_active) 163 target.timing.pixel_clock = si->ps.p1_timing.pixel_clock; 184 if (si->ps.ext_pll) DACW(PIXPLLC2, 0x80000401); 213 switch (si->ps.card_type) { 231 /* switch(si->ps.card_type) 253 max_pclk = si->ps.max_dac1_clock_8; 257 max_pclk = si [all...] |
/haiku/src/add-ons/accelerants/via/engine/ |
H A D | dac2.c | 78 r = si->color_data; 157 if (si->ps.tmds2_active && !si->settings.pgm_panel) 166 if (si->ps.tmds2_active) 171 target.timing.pixel_clock = si->ps.p2_timing.pixel_clock; 192 if (si->ps.ext_pll) DAC2W(PIXPLLC2, 0x80000401); 221 switch (si->ps.card_type) { 239 /* switch(si->ps.card_type) 261 max_pclk = si->ps.max_dac2_clock_8; 265 max_pclk = si [all...] |
/haiku/src/add-ons/accelerants/neomagic/engine/ |
H A D | nm_general.c | 15 #define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \ 94 if (si->ps.int_assigned) 106 si->ps.card_type = NM2070; 107 sprintf(si->adi.name, "Neomagic MagicGraph 128"); 108 sprintf(si->adi.chipset, "NM2070 (ISA)"); 111 si->ps.card_type = NM2090; 112 sprintf(si->adi.name, "Neomagic MagicGraph 128V"); 113 sprintf(si->adi.chipset, "NM2090 (ISA)"); 116 si->ps.card_type = NM2093; 117 sprintf(si [all...] |
H A D | nm_bes.c | 13 * si->dm.h_display_start and si->dm.v_display_start determine where the new 20 if (!si->overlay.active) return; 37 crtc_hstart = si->dm.h_display_start; 39 crtc_hend = crtc_hstart + si->dm.timing.h_display; 40 crtc_vstart = si->dm.v_display_start; 42 crtc_vend = crtc_vstart + si->dm.timing.v_display; 53 if (si->overlay.ow.h_start < crtc_hstart) 60 if (si->overlay.ow.h_start >= (crtc_hend - 1)) 68 temp1 = (si [all...] |