Searched refs:x1 (Results 251 - 275 of 2219) sorted by relevance

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/freebsd-current/contrib/arm-optimized-routines/pl/math/
H A Dsv_erfc_1u8.c30 .max = 0x1.b3ep+4, /* 3487/128. */
33 .p20 = 0x1.5555555555555p-2, /* 1/3, used to compute 2/3 and 1/6. */
34 .p40 = -0x1.999999999999ap-4, /* 1/10. */
35 .p41 = -0x1.999999999999ap-2, /* 2/5. */
36 .p42 = 0x1.1111111111111p-3, /* 2/15. */
37 .p51 = -0x1.c71c71c71c71cp-3, /* 2/9. */
38 .p52 = 0x1.6c16c16c16c17p-5, /* 2/45. */
40 .q5 = 0x1.3333333333333p0,
41 .q6 = 0x1.2aaaaaaaaaaabp0,
42 .q7 = 0x1
[all...]
H A Dtanh_3u.c13 #define InvLn2 0x1.71547652b82fep0
14 #define Ln2hi 0x1.62e42fefa39efp-1
15 #define Ln2lo 0x1.abc9e3b39803fp-56
16 #define Shift 0x1.8p52
18 #define BoringBound 0x403241bf835f9d5f /* asuint64 (0x1.241bf835f9d5fp+4). */
50 tanh(-0x1.c4a4ca0f9f3b7p-3) got -0x1.bd6a21a163627p-3
51 want -0x1.bd6a21a163624p-3. */
H A Dv_exp_tail_inline.h32 .shift = V2 (0x1.8p52),
33 .invln2 = V2 (0x1.71547652b82fep8), /* N/ln2. */
34 .ln2_hi = V2 (0x1.62e42fefa39efp-9), /* ln2/N. */
35 .ln2_lo = V2 (0x1.abc9e3b39803f3p-64),
36 .poly = { V2 (1.0), V2 (0x1.fffffffffffd4p-2), V2 (0x1.5555571d6b68cp-3),
37 V2 (0x1.5555576a59599p-5) },
/freebsd-current/sys/arm64/linux/
H A Dlinux_support.S46 SET_FAULT_HANDLER(xzr, x1)
47 EXIT_USER_ACCESS_CHECK(w0, x1)
71 prfm pstl1strm, [x1]
73 1: ldxr w4, [x1] /* Load oldval from uaddr */
74 stlxr w0, w6, [x1] /* Store oparg to uaddr */
93 prfm pstl1strm, [x1]
95 1: ldxr w4, [x1]
97 stlxr w0, w3, [x1]
116 prfm pstl1strm, [x1]
118 1: ldxr w4, [x1]
[all...]
/freebsd-current/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mn-pinfunc.h15 #define MX8MN_IOMUXC_BOOT_MODE2_I2C1_SCL 0x020 0x25C 0x55C 0x1 0x3
17 #define MX8MN_IOMUXC_BOOT_MODE3_I2C1_SDA 0x024 0x260 0x56C 0x1 0x3
19 #define MX8MN_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x000 0x1 0x0
23 #define MX8MN_IOMUXC_GPIO1_IO01_PWM1_OUT 0x02C 0x294 0x000 0x1 0x0
27 #define MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x030 0x298 0x000 0x1 0x0
30 #define MX8MN_IOMUXC_GPIO1_IO03_USDHC1_VSELECT 0x034 0x29C 0x000 0x1 0x0
34 #define MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x038 0x2A0 0x000 0x1 0x0
38 #define MX8MN_IOMUXC_GPIO1_IO05_M4_NMI 0x03C 0x2A4 0x000 0x1 0x0
42 #define MX8MN_IOMUXC_GPIO1_IO06_ENET1_MDC 0x040 0x2A8 0x000 0x1 0x0
46 #define MX8MN_IOMUXC_GPIO1_IO07_ENET1_MDIO 0x044 0x2AC 0x4C0 0x1
[all...]
/freebsd-current/contrib/netbsd-tests/lib/libm/
H A Dt_exp.c155 { 0x1.fffffffffffffp9, 0x1.ffffffffffd3ap1023, 0.00,
158 { 0x1.fffffep6, 0x1.ffff4ep+127, 0x1.ffff4ep+127, 6e30, 0.0 },
167 { 1.1, 0x1.125fbee250664p+1, 0x1.125fc0p+1, 0x1p-52, 0x1.8p-22 },
168 { 2.2, 0x1.2611186bae675p+2, 0x1
[all...]
/freebsd-current/contrib/llvm-project/clang/lib/Headers/
H A Darm64intr.h31 _ARM64_BARRIER_OSHLD = 0x1
/freebsd-current/contrib/llvm-project/compiler-rt/lib/builtins/ppc/
H A Dfloattitf.c45 return ((ConvertedHiPart * 0x1.0p64) + ConvertedLoPart);
/freebsd-current/sys/contrib/device-tree/include/dt-bindings/pmu/
H A Dexynos_ppmu.h13 #define PPMU_WO_BUSY_CYCLE_CNT 0x1
/freebsd-current/sys/contrib/libsodium/src/libsodium/include/sodium/private/
H A Dsse2_64_32.h22 union { int64_t as64; int32_t as32[2]; } x0, x1; local
23 x0.as64 = q0; x1.as64 = q1;
24 return _mm_set_epi32(x1.as32[1], x1.as32[0], x0.as32[1], x0.as32[0]);
/freebsd-current/sys/dts/include/dt-bindings/soc/
H A Dqcom,tcsr.h6 #define TCSR_USB_SELECT_USB3_P0 0x1
/freebsd-current/sys/contrib/xen/io/
H A Dlibxenvchan.h57 #define VCHAN_NOTIFY_WRITE 0x1
/freebsd-current/sys/contrib/device-tree/include/dt-bindings/iio/addac/
H A Dadi,ad74413r.h7 #define CH_FUNC_VOLTAGE_OUTPUT 0x1
/freebsd-current/sys/contrib/device-tree/include/dt-bindings/mailbox/
H A Dtegra186-hsp.h14 #define TEGRA_HSP_MBOX_TYPE_SM 0x1
/freebsd-current/contrib/llvm-project/compiler-rt/lib/orc/
H A Dcoff_platform.h30 ORC_RT_RTLD_LAZY = 0x1,
/freebsd-current/sys/dev/isci/scil/
H A Dintel_sat.h87 #define SAT_PROTOCOL_PACKET_DMA_DATA_IN (SAT_PROTOCOL_PACKET | 0x1)
/freebsd-current/sys/cddl/compat/opensolaris/sys/
H A Dmisc.h36 #define _ACL_ACLENT_ENABLED 0x1
/freebsd-current/sys/dev/sfxge/common/
H A Def10_signed_image_layout.h72 #define SIGNED_IMAGE_CHUNK_HDR_VERSION 0x1
/freebsd-current/sys/dev/virtio/balloon/
H A Dvirtio_balloon.h35 #define VIRTIO_BALLOON_F_MUST_TELL_HOST 0x1 /* Tell before reclaiming pages */
/freebsd-current/usr.bin/mkuzip/
H A Dmkuz_blk.h36 #define MKUZ_BLK_EOF (void *)0x1
/freebsd-current/sys/contrib/dev/rtw89/
H A Drtw8851b_rfk_table.c11 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
15 RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x1),
17 RTW89_DECL_RFK_WM(0x032c, BIT(20), 0x1),
21 RTW89_DECL_RFK_WM(0xc0f4, BIT(11), 0x1),
24 RTW89_DECL_RFK_WM(0xc0f4, 0x300, 0x1),
30 RTW89_DECL_RFK_WM(0x032c, BIT(16), 0x1),
33 RTW89_DECL_RFK_WM(0x032c, 0xc0000000, 0x1),
40 RTW89_DECL_RFK_WM(0x12a0, BIT(15), 0x1),
42 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
43 RTW89_DECL_RFK_WM(0x030c, BIT(28), 0x1),
[all...]
H A Dwow.h9 RTW89_WOW_RSN_RX_PTK_REKEY = 0x1,
/freebsd-current/sys/dev/qat/qat_api/firmware/include/
H A Dicp_qat_fw_comp.h119 #define ICP_QAT_FW_COMP_SESSION_TYPE_MASK 0x1
127 #define ICP_QAT_FW_COMP_AUTO_SELECT_BEST_MASK 0x1
135 #define ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_MASK 0x1
146 #define ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_MASK 0x1
155 #define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_MASK 0x1
557 #define ICP_QAT_FW_COMP_SOP_MASK 0x1
565 #define ICP_QAT_FW_COMP_EOP_MASK 0x1
569 #define ICP_QAT_FW_COMP_BFINAL_MASK 0x1
577 #define ICP_QAT_FW_COMP_CNV_MASK 0x1
585 #define ICP_QAT_FW_COMP_CNVNR_MASK 0x1
[all...]
/freebsd-current/contrib/arm-optimized-routines/math/test/
H A Drunulp.sh67 t pow 0x1.fp-1 0x1.08p0 x 0x1p8 0x1p17 80000
68 t pow 0x1.fp-1 0x1.08p0 x -0x1p8 -0x1p17 80000
71 t pow 0x1.ffffffffffff0p-1 0x1.0000000000008p0 x 0x1p60 0x1p68 50000
72 t pow 0x1.ffffffffff000p-1 0x1p0 x 0x1p50 0x1p52 50000
73 t pow -0x1.ffffffffff000p-1 -0x1p0 x 0x1p50 0x1p52 50000
80 t exp10 1 0x1.34413509f79ffp8 50000
81 t exp10 -1 -0x1
[all...]
/freebsd-current/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx50-pinfunc.h14 #define MX50_PAD_KEY_COL0__GPIO4_0 0x020 0x2cc 0x000 0x1 0x0
19 #define MX50_PAD_KEY_ROW0__GPIO4_1 0x024 0x2d0 0x000 0x1 0x0
24 #define MX50_PAD_KEY_COL1__GPIO4_2 0x028 0x2d4 0x000 0x1 0x0
29 #define MX50_PAD_KEY_ROW1__GPIO4_3 0x02c 0x2d8 0x000 0x1 0x0
34 #define MX50_PAD_KEY_COL2__GPIO4_4 0x030 0x2dc 0x000 0x1 0x0
39 #define MX50_PAD_KEY_ROW2__GPIO4_5 0x034 0x2e0 0x000 0x1 0x0
44 #define MX50_PAD_KEY_COL3__GPIO4_6 0x038 0x2e4 0x000 0x1 0x0
49 #define MX50_PAD_KEY_ROW3__GPIO4_7 0x03c 0x2e8 0x000 0x1 0x0
54 #define MX50_PAD_I2C1_SCL__GPIO6_18 0x040 0x2ec 0x000 0x1 0x0
57 #define MX50_PAD_I2C1_SDA__GPIO6_19 0x044 0x2f0 0x000 0x1
[all...]

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