Searched refs:BitVector (Results 151 - 175 of 285) sorted by relevance
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonBlockRanges.h | 12 #include "llvm/ADT/BitVector.h" 174 BitVector Reserved;
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600InstrInfo.h | 214 void reserveIndirectRegisters(BitVector &Reserved,
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/freebsd-current/contrib/llvm-project/llvm/tools/llvm-pdbutil/ |
H A D | PrettyClassLayoutGraphicalDumper.cpp | 45 const BitVector &UseMap = Layout.usedBytes();
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/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | RegAllocBasic.cpp | 71 BitVector UsableRegs;
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H A D | SpillPlacement.cpp | 30 #include "llvm/ADT/BitVector.h" 353 void SpillPlacement::prepare(BitVector &RegBundles) {
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H A D | ScheduleDAG.cpp | 605 BitVector VisitedBack; 679 void ScheduleDAGTopologicalSort::Shift(BitVector& Visited, int LowerBound,
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H A D | SwitchLoweringUtils.cpp | 325 BitVector Dests(FuncInfo.MF->getNumBlockIDs()); 374 BitVector Dests(FuncInfo.MF->getNumBlockIDs());
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.h | 162 BitVector getReservedRegs(const MachineFunction &MF) const override;
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/freebsd-current/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | CodeGenInstruction.h | 16 #include "llvm/ADT/BitVector.h" 112 BitVector DoNotEncode;
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H A D | RegisterBankEmitter.cpp | 17 #include "llvm/ADT/BitVector.h" 202 BitVector BV(RegisterClassHierarchy.getRegClasses().size());
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H A D | RegisterInfoEmitter.cpp | 22 #include "llvm/ADT/BitVector.h" 589 // Print a BitVector as a sequence of hex numbers using a little-endian mapping. 592 const BitVector &Bits, 606 BitVector Values; 1325 BitVector MaskBV(RegisterClasses.size()); 1448 llvm::BitVector InAllocClass(Regs.size() + 1, false); 1690 BitVector Covered = RegBank.computeCoveredRegisters(*Regs); 1855 const BitVector &SubClasses = RC.getSubClasses();
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.cpp | 21 #include "llvm/ADT/BitVector.h" 404 BitVector 409 BitVector Reserved(getNumRegs()); 465 BitVector 467 BitVector Reserved = getStrictlyReservedRegs(MF);
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H A D | AArch64SpeculationHardening.cpp | 96 #include "llvm/ADT/BitVector.h" 146 BitVector RegsNeedingCSDBBeforeUse; 147 BitVector RegsAlreadyMasked;
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/freebsd-current/contrib/llvm-project/clang/lib/Analysis/ |
H A D | UninitializedValues.cpp | 29 #include "llvm/ADT/BitVector.h" 839 llvm::BitVector &wasAnalyzed, 876 llvm::BitVector hadUse; 938 llvm::BitVector previouslyVisited(cfg.getNumBlockIDs()); 940 llvm::BitVector wasAnalyzed(cfg.getNumBlockIDs(), false);
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/freebsd-current/contrib/llvm-project/clang/include/clang/Serialization/ |
H A D | ModuleFile.h | 23 #include "llvm/ADT/BitVector.h" 190 llvm::BitVector SearchPathUsage;
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/freebsd-current/contrib/llvm-project/clang/lib/Format/ |
H A D | UnwrappedLineParser.h | 24 #include "llvm/ADT/BitVector.h" 324 llvm::BitVector DeclarationScopeStack;
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.h | 93 BitVector getReservedRegs(const MachineFunction &MF) const override;
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyMachineFunctionInfo.h | 48 BitVector VRegStackified;
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H A D | WebAssemblyRegColoring.cpp | 286 BitVector UsedColors(SortedIntervals.size());
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/freebsd-current/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | MachineRegisterInfo.h | 17 #include "llvm/ADT/BitVector.h" 134 BitVector UsedPhysRegMask; 140 BitVector ReservedRegs; 899 const BitVector &getUsedPhysRegsMask() const { return UsedPhysRegMask; } 945 const BitVector &getReservedRegs() const {
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H A D | ScheduleDAG.h | 18 #include "llvm/ADT/BitVector.h" 718 BitVector Visited; 727 void Shift(BitVector& Visited, int LowerBound, int UpperBound);
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/freebsd-current/contrib/llvm-project/llvm/lib/ProfileData/Coverage/ |
H A D | CoverageMapping.cpp | 226 Expected<BitVector> CounterMappingContext::evaluateBitmap( 236 // Mask each bitmap byte into the BitVector. Go in reverse so that the 238 BitVector Result(SizeInBits, false); 252 const BitVector &ExecutedTestVectorBitmap; 281 MCDCRecordProcessor(const BitVector &Bitmap, 348 void findExecutedTestVectors(const BitVector &ExecutedTestVectorBitmap) { 480 const BitVector &ExecutedTestVectorBitmap, 840 Expected<BitVector> ExecutedTestVectorBitmap =
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VERegisterInfo.cpp | 16 #include "llvm/ADT/BitVector.h" 66 BitVector VERegisterInfo::getReservedRegs(const MachineFunction &MF) const { 67 BitVector Reserved(getNumRegs());
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/freebsd-current/contrib/llvm-project/llvm/lib/DebugInfo/PDB/ |
H A D | UDTLayout.cpp | 11 #include "llvm/ADT/BitVector.h" 284 BitVector ChildBytes = Child->usedBytes();
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/freebsd-current/contrib/llvm-project/lld/MachO/ |
H A D | InputSection.h | 19 #include "llvm/ADT/BitVector.h" 265 llvm::BitVector live;
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