/freebsd-9.3-release/sys/dev/vxge/vxgehal/ |
H A D | vxgehal-mrpcim.h | 69 #define VXGE_HAL_MRPCIM_ERROR_REG_CLEAR(reg) \ 74 (reg)); 76 #define VXGE_HAL_MRPCIM_ERROR_REG_MASK(reg) \ 81 (reg)); 83 #define VXGE_HAL_MRPCIM_ERROR_REG_UNMASK(mask, reg) \ 88 (reg));
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/freebsd-9.3-release/contrib/gcc/ |
H A D | unwind-dw2.h | 48 _Unwind_Word reg; member in union:__anon1234::frame_state_reg_info::__anon1235::__anon1236 60 } reg[DWARF_FRAME_REGISTERS+1]; member in struct:__anon1234::frame_state_reg_info 66 /* The CFA can be described in terms of a reg+offset or a
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/freebsd-9.3-release/lib/libc/sparc64/fpu/ |
H A D | fpu_reg.S | 35 .macro ld32 reg 37 ld [%o0], %f\reg 40 .macro st32 reg 42 st %f\reg, [%o0] 45 .macro ld64 reg 47 ldd [%o0], %f\reg 50 .macro st64 reg 52 std %f\reg, [%o0]
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/freebsd-9.3-release/lib/libthread_db/arch/i386/ |
H A D | libpthread_md.c | 40 pt_reg_to_ucontext(const struct reg *r, ucontext_t *uc) 47 pt_ucontext_to_reg(const ucontext_t *uc, struct reg *r) 107 pt_reg_sstep(struct reg *reg, int step) argument 111 old = reg->r_eflags; 113 reg->r_eflags |= 0x0100; 115 reg->r_eflags &= ~0x0100; 116 return (old != reg->r_eflags); /* changed ? */
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/freebsd-9.3-release/sys/boot/i386/boot2/ |
H A D | sio.S | 30 movw $SIO_PRT+0x3,%dx # Data format reg 33 subb $0x3,%dl # Divisor latch reg 36 movw $SIO_PRT+0x3,%dx # Data format reg 39 incl %edx # Modem control reg 42 incl %edx # Line status reg 58 movw $SIO_PRT+0x5,%dx # Line status reg 66 subb $0x5,%dl # Transmitter hold reg 74 sio_getc.1: subb $0x5,%dl # Receiver buffer reg
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/freebsd-9.3-release/sys/dev/mii/ |
H A D | ip1000phy.c | 122 uint32_t gig, reg, speed; local 199 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); 200 if (reg & BMSR_LINK) { 312 uint32_t reg; local 314 reg = 0; 316 reg = PHY_READ(sc, IP1000PHY_MII_ANAR); 317 reg &= ~(IP1000PHY_ANAR_PAUSE | IP1000PHY_ANAR_APAUSE); 318 reg |= IP1000PHY_ANAR_NP; 320 reg |= IP1000PHY_ANAR_10T | IP1000PHY_ANAR_10T_FDX | 323 reg | 354 uint32_t reg; local [all...] |
/freebsd-9.3-release/sys/i386/pci/ |
H A D | pci_cfgreg.c | 93 static uint32_t pci_docfgregread(int bus, int slot, int func, int reg, 95 static int pcireg_cfgread(int bus, int slot, int func, int reg, int bytes); 96 static void pcireg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes); 101 unsigned reg, unsigned bytes); 103 unsigned reg, int data, unsigned bytes); 210 pci_docfgregread(int bus, int slot, int func, int reg, int bytes) argument 216 return (pciereg_cfgread(bus, slot, func, reg, bytes)); 218 return (pcireg_cfgread(bus, slot, func, reg, bytes)); 225 pci_cfgregread(int bus, int slot, int func, int reg, int bytes) argument 234 if (reg 245 pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes) argument 262 pci_cfgenable(unsigned bus, unsigned slot, unsigned func, int reg, int bytes) argument 345 pcireg_cfgread(int bus, int slot, int func, int reg, int bytes) argument 371 pcireg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes) argument 664 pciereg_cfgread(int bus, unsigned slot, unsigned func, unsigned reg, unsigned bytes) argument 702 pciereg_cfgwrite(int bus, unsigned slot, unsigned func, unsigned reg, int data, unsigned bytes) argument [all...] |
/freebsd-9.3-release/sys/ia64/ia64/ |
H A D | unwind.c | 164 int reg; local 175 reg = from - UWX_REG_GR(0); 176 if (reg == 1) 178 else if (reg == 12) 180 else if (reg == 13) 182 else if (reg >= 2 && reg <= 3) 183 val = (&tf->tf_scratch.gr2)[reg - 2]; 184 else if (reg >= 8 && reg < 211 int reg; local [all...] |
/freebsd-9.3-release/sys/mips/nlm/hal/ |
H A D | cpucontrol.h | 84 nlm_mfcr(uint32_t reg) argument 95 : "=r" (res) : "r"(reg) 102 nlm_mtcr(uint32_t reg, uint64_t value) argument 112 : "r" (value), "r" (reg) 120 nlm_mfcr(uint32_t reg) argument 134 : "r"(reg) : "$8", "$9"); 140 nlm_mtcr(uint32_t reg, uint64_t val) argument 159 : :"r"(hi), "r"(lo), "r"(reg)
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/freebsd-9.3-release/sys/sys/ |
H A D | procfs.h | 33 #include <machine/reg.h> 35 typedef struct reg gregset_t;
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/freebsd-9.3-release/sys/dev/siba/ |
H A D | sibavar.h | 102 #define siba_mips_read_2(sc, core, reg) \ 104 (core * SIBA_CORE_LEN) + (reg)) 106 #define siba_mips_read_4(sc, core, reg) \ 108 (core * SIBA_CORE_LEN) + (reg)) 110 #define siba_mips_write_2(sc, core, reg, val) \ 112 (core * SIBA_CORE_LEN) + (reg), (val)) 114 #define siba_mips_write_4(sc, core, reg, val) \ 116 (core * SIBA_CORE_LEN) + (reg), (val)) 118 #define SIBA_READ_4(siba, reg) \ 119 bus_space_read_4((siba)->siba_mem_bt, (siba)->siba_mem_bh, (reg)) [all...] |
/freebsd-9.3-release/contrib/gcc/config/rs6000/ |
H A D | linux-unwind.h | 242 fs->regs.reg[i].how = REG_SAVED_OFFSET; 243 fs->regs.reg[i].loc.offset = (long) ®s->gpr[i] - new_cfa; 246 fs->regs.reg[CR2_REGNO].how = REG_SAVED_OFFSET; 247 fs->regs.reg[CR2_REGNO].loc.offset = (long) ®s->ccr - new_cfa; 249 fs->regs.reg[LINK_REGISTER_REGNUM].how = REG_SAVED_OFFSET; 250 fs->regs.reg[LINK_REGISTER_REGNUM].loc.offset = (long) ®s->link - new_cfa; 252 fs->regs.reg[ARG_POINTER_REGNUM].how = REG_SAVED_OFFSET; 253 fs->regs.reg[ARG_POINTER_REGNUM].loc.offset = (long) ®s->nip - new_cfa; 274 fs->regs.reg[i + 32].how = REG_SAVED_OFFSET; 275 fs->regs.reg[ [all...] |
/freebsd-9.3-release/sys/powerpc/powermac/ |
H A D | uninorthpci.c | 137 u_int32_t reg[3]; local 142 if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8) 153 sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[1] + 0x800000, PAGE_SIZE); 154 sc->sc_data = (vm_offset_t)pmap_mapdev(reg[1] + 0xc00000, PAGE_SIZE); 156 sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[0] + 0x800000, PAGE_SIZE); 157 sc->sc_data = (vm_offset_t)pmap_mapdev(reg[0] + 0xc00000, PAGE_SIZE); 164 uninorth_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, argument 171 caoff = sc->sc_data + (reg 191 uninorth_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, u_int32_t val, int width) argument 216 uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot, u_int func, u_int reg) argument [all...] |
H A D | cuda.c | 146 uint8_t reg; local 196 reg = cuda_read_reg(sc, vDirB); 197 reg |= 0x30; /* register B bits 4 and 5: outputs */ 198 cuda_write_reg(sc, vDirB, reg); 200 reg = cuda_read_reg(sc, vDirB); 201 reg &= 0xf7; /* register B bit 3: input */ 202 cuda_write_reg(sc, vDirB, reg); 204 reg = cuda_read_reg(sc, vACR); 205 reg &= ~vSR_OUT; /* make sure SR is set to IN */ 206 cuda_write_reg(sc, vACR, reg); 282 uint8_t reg; local 292 uint8_t reg; local 302 uint8_t reg; local 312 uint8_t reg; local 322 uint8_t reg; local 332 uint8_t reg; local 342 uint8_t reg; local 518 uint8_t reg; local [all...] |
/freebsd-9.3-release/sys/sparc64/pci/ |
H A D | ofw_pcibus.c | 134 uint32_t reg; local 149 reg = CS_READ(PCIR_BRIDGECTL_1, 1); 150 reg |= PCIB_BCR_MASTER_ABORT_MODE | PCIB_BCR_SERR_ENABLE | 155 busno, slot, func, CS_READ(PCIR_BRIDGECTL_1, 1), reg); 157 CS_WRITE(PCIR_BRIDGECTL_1, reg, 1); 159 reg = OFW_PCI_LATENCY; 163 busno, slot, func, CS_READ(PCIR_SECLAT_1, 1), reg); 165 CS_WRITE(PCIR_SECLAT_1, reg, 1); 167 reg = CS_READ(PCIR_MINGNT, 1); 168 if ((int)reg > [all...] |
/freebsd-9.3-release/sys/dev/wi/ |
H A D | if_wireg.h | 105 #define CSR_WRITE_4(sc, reg, val) \ 107 (sc)->wi_bus_type == WI_BUS_PCI_NATIVE ? (reg)*2 : (reg), val) 108 #define CSR_WRITE_2(sc, reg, val) \ 110 (sc)->wi_bus_type == WI_BUS_PCI_NATIVE ? (reg)*2 : (reg), val) 111 #define CSR_WRITE_1(sc, reg, val) \ 113 (sc)->wi_bus_type == WI_BUS_PCI_NATIVE ? (reg)*2 : (reg), val) 115 #define CSR_READ_4(sc, reg) \ [all...] |
/freebsd-9.3-release/sys/dev/iicbus/ |
H A D | ds133x.c | 120 uint8_t reg, orig; local 128 if ((error = ds133x_read(dev, DS1339_REG_STATUS, ®, 1))) 131 orig = reg; 132 reg |= 0x7C; 134 if ((error = ds133x_write(dev, DS1339_REG_STATUS, ®, 1))) 137 if ((error = ds133x_read(dev, DS1339_REG_STATUS, ®, 1))) 140 if ((reg & 0x7C) != 0) { 157 if ((error = ds133x_read(dev, DS1339_REG_CONTROL, ®, 1))) 160 orig = reg; 161 reg | 190 uint8_t reg; local [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcFrameLowering.cpp | 184 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) 185 if (MRI->isPhysRegUsed(reg)) 188 for (unsigned reg = SP::L0; reg <= SP::L7; ++reg) 189 if (MRI->isPhysRegUsed(reg)) 212 for (unsigned reg = SP::I0; reg < [all...] |
/freebsd-9.3-release/contrib/gdb/gdb/ |
H A D | ax-gdb.h | 65 because the subexpression's value lives in a register; u.reg is 88 int reg; member in union:axs_value::__anon1327
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H A D | nto-tdep.h | 87 regset it came from. If reg == -1 update all regsets. */ 88 #define nto_regset_id(reg) \ 89 (*current_nto_target.nto_regset_id) (reg) 108 #define nto_register_area(reg, regset, off) \ 109 (*current_nto_target.nto_register_area) (reg, regset, off)
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/freebsd-9.3-release/contrib/groff/src/roff/troff/ |
H A D | reg.h | 23 class reg : public object { class in inherits:object 35 class constant_int_reg : public reg { 42 class general_reg : public reg { 73 reg *lookup_number_reg(symbol);
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/freebsd-9.3-release/contrib/llvm/lib/Target/R600/ |
H A D | AMDGPUAsmPrinter.cpp | 190 unsigned reg; local 195 reg = MO.getReg(); 196 if (reg == AMDGPU::VCC) { 201 switch (reg) { 209 if (AMDGPU::SReg_32RegClass.contains(reg)) { 212 } else if (AMDGPU::VReg_32RegClass.contains(reg)) { 215 } else if (AMDGPU::SReg_64RegClass.contains(reg)) { 218 } else if (AMDGPU::VReg_64RegClass.contains(reg)) { 221 } else if (AMDGPU::VReg_96RegClass.contains(reg)) { 224 } else if (AMDGPU::SReg_128RegClass.contains(reg)) { [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/X86/ |
H A D | X86VZeroUpper.cpp | 125 for (unsigned reg = X86::YMM0; reg <= X86::YMM31; ++reg) { 126 if (!MO.clobbersPhysReg(reg)) 129 for (unsigned reg = X86::ZMM0; reg <= X86::ZMM31; ++reg) { 130 if (!MO.clobbersPhysReg(reg)) 158 for (unsigned reg = X86::YMM0; reg < [all...] |
/freebsd-9.3-release/lib/libc/i386/sys/ |
H A D | i386_clr_watch.c | 32 #include <machine/reg.h>
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/freebsd-9.3-release/lib/libthread_db/arch/mips/ |
H A D | libpthread_md.c | 41 pt_reg_to_ucontext(const struct reg *r, ucontext_t *uc) 52 pt_ucontext_to_reg(const ucontext_t *uc, struct reg *r) 84 pt_reg_sstep(struct reg *reg __unused, int step __unused)
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