| /freebsd-13-stable/sys/xen/interface/ |
| H A D | physdev.h | 155 #define MAP_PIRQ_TYPE_MSI_SEG 0x3
|
| /freebsd-13-stable/contrib/wpa/src/ap/ |
| H A D | ieee802_11_he.c | 305 if (((ap_tx_mcs_set >> (j * 2)) & 0x3) == 3)
308 if (((sta_rx_mcs_set >> (j * 2)) & 0x3) == 3)
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| H A D | ieee802_11_vht.c | 152 if ((ap_tx_mcs_set & (0x3 << (i * 2))) == 3)
155 if ((sta_rx_mcs_set & (0x3 << (i * 2))) == 3)
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| /freebsd-13-stable/contrib/blacklist/port/ |
| H A D | sockaddr_snprintf.c | 133 sin6->sin6_flowinfo, s[0x0], s[0x1], s[0x2], s[0x3], s[0x4], s[0x5],
157 s[0x0], s[0x1], s[0x2], s[0x3], s[0x4], s[0x5],
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| /freebsd-13-stable/sys/dev/mlx4/ |
| H A D | qp.h | 83 MLX4_QP_ST_UD = 0x3,
89 MLX4_QP_PM_MIGRATED = 0x3,
|
| /freebsd-13-stable/sys/dev/hwpmc/ |
| H A D | hwpmc_core.c | 55 #define CORE_CPUID_EDX 0x3
257 if (ev == 0x0 && umask == 0x3 && ri != 2)
575 #define IAP_F_CORE (0x3 << 14) /* Core specificity */
577 #define IAP_F_PREFETCH (0x3 << 12) /* Prefetch */
580 #define IAP_F_SNOOPTYPE (0x3 << 8) /* Snoop type */
585 #define IAP_CORE_ALL (0x3 << 14)
633 mask = 0x3;
664 mask = 0x3;
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| /freebsd-13-stable/contrib/opencsd/decoder/include/opencsd/etmv4/ |
| H A D | trc_etmv4_stack_elem.h | 285 void setParam(const uint32_t param, const int nParamNum) { m_param[(nParamNum & 0x3)] = param; };
286 const uint32_t &getParam(const int nParamNum) const { return m_param[(nParamNum & 0x3)]; };
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ShuffleDecodeConstantPool.cpp | 183 Index += Element & 0x3;
236 Index += Selector & 0x3;
|
| /freebsd-13-stable/sys/dev/vnic/ |
| H A D | nic.h | 201 RX_MCAST = 0x3,
219 TX_MCAST = 0x3,
|
| /freebsd-13-stable/sys/mips/nlm/hal/ |
| H A D | poe.h | 52 #define POE_CL1_ENQ_SPILL_BASE_HI 0x3
351 nlm_write_poe_reg(poe_base, POE_TX_TIMER, 0x3);
|
| /freebsd-13-stable/sys/libkern/ |
| H A D | jenkins_hash.c | 222 if ((u.i & 0x3) == 0) {
375 if ((u.i & 0x3) == 0) {
|
| /freebsd-13-stable/sys/dev/usb/controller/ |
| H A D | xhcireg.h | 127 #define XHCI_PS_PIC_GET(x) (((x) >> 14) & 0x3) /* RW - port indicator */
128 #define XHCI_PS_PIC_SET(x) (((x) & 0x3) << 14) /* RW - port indicator */
|
| /freebsd-13-stable/sys/dev/usb/wlan/ |
| H A D | if_urtwreg.h | 120 #define URTW_EPROM_CMD_CONFIG (0x3)
238 #define URTW_8225_ADDR_3_MAGIC 0x3
|
| /freebsd-13-stable/sys/dev/cxgb/common/ |
| H A D | cxgb_vsc8211.c | 82 #define M_ACSR_ACTIPHY_TMR 0x3
86 #define M_ACSR_SPEED 0x3
|
| /freebsd-13-stable/sys/arm/altera/socfpga/ |
| H A D | socfpga_manager.c | 69 #define CTRL_CDRATIO_MASK 0x3
122 #define FPGAMGR_MODE_INIT 0x3
|
| /freebsd-13-stable/sys/arm64/arm64/ |
| H A D | disassem.c | 42 #define ARM_INSN_SIZE_MASK 0x3
59 "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
494 case 0x3:
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| /freebsd-13-stable/sys/dev/qlnx/qlnxe/ |
| H A D | pcics_reg_driver.h | 74 #define PCICFG_PM_CAPABILITY_VERSION (0x3<<16)
87 #define PCICFG_PM_CSR_STATE (0x3<<0)
|
| /freebsd-13-stable/crypto/openssl/include/openssl/ |
| H A D | asn1t.h | 515 # define ASN1_TFLG_SET_ORDER (0x3 << 1)
518 # define ASN1_TFLG_SK_MASK (0x3 << 1)
531 # define ASN1_TFLG_TAG_MASK (0x3 << 3)
552 # define ASN1_TFLG_PRIVATE (0x3<<6)
554 # define ASN1_TFLG_TAG_CLASS (0x3<<6)
562 # define ASN1_TFLG_ADB_MASK (0x3<<8)
|
| /freebsd-13-stable/contrib/llvm-project/clang/include/clang/Analysis/ |
| H A D | ProgramPoint.h | 106 Data2(nullptr, (((unsigned) k) >> 0) & 0x3),
107 L(l, (((unsigned) k) >> 2) & 0x3),
108 Tag(tag, (((unsigned) k) >> 4) & 0x3) {
120 Data2(P2, (((unsigned) k) >> 0) & 0x3),
121 L(l, (((unsigned) k) >> 2) & 0x3),
122 Tag(tag, (((unsigned) k) >> 4) & 0x3) {}
|
| /freebsd-13-stable/sys/contrib/openzfs/module/icp/algs/edonr/ |
| H A D | edonr.c | 112 #define LS1_256(c, x0, x1, x2, x3, x4, x5, x6, x7) \
117 s1 = rotl32(x07 + x3, 4); \
119 x23 = x2 + x3; \
129 #define LS1_512(c, x0, x1, x2, x3, x4, x5, x6, x7) \
134 s1 = rotl64(x07 + x3, 5); \
136 x23 = x2 + x3; \
|
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCWin64EH.cpp | 393 b = ((reg & 0x3) << 6) | (inst.Offset >> 3);
409 b = ((reg & 0x3) << 6) | (inst.Offset >> 3);
417 b = ((reg & 0x3) << 6) | ((inst.Offset >> 3) - 1);
425 b = ((reg & 0x3) << 6) | (inst.Offset >> 3);
441 b = ((reg & 0x3) << 6) | (inst.Offset >> 3);
449 b = ((reg & 0x3) << 6) | ((inst.Offset >> 3) - 1);
|
| /freebsd-13-stable/sys/dev/qlxge/ |
| H A D | qls_hw.h | 213 #define Q81_CTL_FUNC_SPECIFIC_VM_PGSIZE_8K (0x3 << 8)
287 #define Q81_CTL_INTRE_RTYPE_MASK (0x3 << 8)
290 #define Q81_CTL_INTRE_RTYPE_SETUP_TO_RD (0x3 << 8)
375 #define Q81_CTL_STOP_CQ_RQ_READ (0x3 << 8)
432 #define Q81_CTL_NIC_RCVC_VLAN_REJECT (0x3 << 1)
1056 #define Q81_MBX_GET_MGMT_CTL_MASK ~0x3
|
| /freebsd-13-stable/sys/dev/bwi/ |
| H A D | bwirf.c | 431 PHY_FILT_SETBITS(mac, 0x3, 0xff9f, 0x40);
507 PHY_WRITE(mac, save_phy_regs[2], save_phy[2] | 0x3);
795 PHY_SETBITS(mac, 0x814, 0x3);
796 PHY_CLRBITS(mac, 0x815, 0x3);
798 PHY_CLRBITS(mac, 0x802, 0x3);
829 PHY_FILT_SETBITS(mac, 0x3, 0xffbf, 0x40);
1015 0x2, 0x3, 0x1, 0xf, 0x6, 0x7, 0x5, 0xf,
1323 PHY_WRITE(mac, 0x814, regs.phy_814 | 0x3);
1785 PHY_CLRBITS(mac, 0x802, 0x3);
1832 PHY_WRITE(mac, 0x3,
[all...] |
| /freebsd-13-stable/sys/dev/ixgbe/ |
| H A D | ixgbe_type.h | 300 #define NVM_OEM_PROD_VER_OFF_H 0x3 /* OEM Product version offset high */
302 #define NVM_OEM_PROD_VER_MOD_LEN 0x3 /* OEM Product version module length */
830 #define IXGBE_LSECRXCTRL_DROP 0x3
1545 #define IXGBE_MDIO_PCS_DEV_TYPE 0x3
1575 #define IXGBE_MDIO_PHY_ID_LOW 0x3 /* PHY ID Low Reg*/
1591 #define IXGBE_MDIO_TX_VENDOR_ALARMS_3_RST_MASK 0x3 /* PHY Reset Complete Mask */
1638 #define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_100M_FULL 0x3 /* 100Mb/s Full Duplex */
2145 #define IXGBE_LED_FILTER 0x3
2169 #define IXGBE_AUTOC_LMS_10G_SERIAL (0x3 << IXGBE_AUTOC_LMS_SHIFT)
2422 #define IXGBE_SAN_MAC_ADDR_PORT1_OFFSET 0x3
[all...] |
| /freebsd-13-stable/sys/dev/ath/ath_hal/ |
| H A D | ah_eeprom_v3.c | 529 currCh->Vpd_delta[2][1] = (eeval >> 14) & 0x3;
540 currCh->Vpd_delta[3][0] = (eeval >> 14) & 0x3;
563 currCh->Vpd_delta[1][2] = (eeval >> 14) & 0x3;
587 currCh->pwr_I[3] = (eeval >> 14) & 0x3;
595 currCh->Vpd_delta[0][3] = (eeval >> 14) & 0x3;
603 currCh->pwr_delta_t2[2][3] = (eeval >> 14) & 0x3;
607 currCh->pwr_delta_t2[2][3] |= ((eeval >> 0) & 0x3) << 2;
615 currCh->Vpd_delta[3][3] |= ((eeval >> 0) & 0x3) << 4;
620 currCh->pwr_delta_t2[3][2] = (eeval >> 14) & 0x3;
624 currCh->pwr_delta_t2[3][2] |= ((eeval >> 0) & 0x3) <<
[all...] |