Searched refs:getID (Results 26 - 50 of 147) sorted by relevance

123456

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFixupVectorISel.cpp128 if (AMDGPU::getRegBitWidth(IdxRC->getID()) != 64)
138 if (AMDGPU::getRegBitWidth(BaseRC->getID()) != 64)
H A DAMDGPUInstructionSelector.cpp93 return RB->getID() == AMDGPU::VCCRegBankID;
296 if (DstRB->getID() == AMDGPU::VCCRegBankID) {
321 if (DstRB->getID() == AMDGPU::SGPRRegBankID) {
346 const bool IsSALU = DstRB->getID() == AMDGPU::SGPRRegBankID;
639 if (DstBank->getID() != AMDGPU::SGPRRegBankID)
1206 if (OffsetRB->getID() != AMDGPU::SGPRRegBankID)
1718 const bool IsVALU = DstRB->getID() == AMDGPU::VGPRRegBankID;
1862 if (SrcBank->getID() == AMDGPU::VGPRRegBankID && DstSize <= 32) {
1886 if (SrcBank->getID() == AMDGPU::SGPRRegBankID && DstSize <= 64) {
1961 IsSgpr = RB->getID()
[all...]
H A DAMDGPURegisterBankInfo.cpp214 unsigned BankID = Bank.getID();
222 if (Dst.getID() == AMDGPU::SGPRRegBankID &&
223 (isVectorRegisterBank(Src) || Src.getID() == AMDGPU::VCCRegBankID)) {
235 (Dst.getID() == AMDGPU::SGPRRegBankID) &&
237 Src.getID() == AMDGPU::SGPRRegBankID ||
238 Src.getID() == AMDGPU::VCCRegBankID))
242 if (Dst.getID() == AMDGPU::AGPRRegBankID &&
243 Src.getID() == AMDGPU::AGPRRegBankID)
1051 if (OpBank->getID() == AMDGPU::VGPRRegBankID)
2578 SrcBank->getID()
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp171 if (RB.getID() == X86::GPRRegBankID) {
181 if (RB.getID() == X86::VECRRegBankID) {
245 if (DstSize > SrcSize && SrcRegBank.getID() == X86::GPRRegBankID &&
246 DstRegBank.getID() == X86::GPRRegBankID) {
281 if (SrcRegBank.getID() == X86::GPRRegBankID &&
282 DstRegBank.getID() == X86::GPRRegBankID && SrcSize > DstSize &&
405 if (X86::GPRRegBankID == RB.getID())
408 if (X86::GPRRegBankID == RB.getID())
411 if (X86::GPRRegBankID == RB.getID())
413 if (X86::VECRRegBankID == RB.getID())
[all...]
/freebsd-13-stable/contrib/llvm-project/clang/lib/ASTMatchers/
H A DASTMatchFinder.cpp380 Timer.setBucket(&TimeByBucket[MC->getID()]);
390 Timer.setBucket(&TimeByBucket[MC->getID()]);
462 Key.MatcherID = Matcher.getID();
611 Timer.setBucket(&TimeByBucket[MP.second->getID()]);
635 Timer.setBucket(&TimeByBucket[MP.second->getID()]);
713 Key.MatcherID = Matcher.getID();
1164 StringRef MatchFinder::MatchCallback::getID() const { return "<unknown>"; } function in class:clang::ast_matchers::MatchFinder::MatchCallback
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.cpp231 switch (RC.getID()) {
384 assert((OpdMapper.getInstrMapping().getID() >= 1 &&
385 OpdMapper.getInstrMapping().getID() <= 4) &&
594 getCopyMapping(DstRB->getID(), SrcRB->getID(), Size),
613 getCopyMapping(DstRB.getID(), SrcRB.getID(), Size),
H A DAArch64InstructionSelector.cpp385 if (RB.getID() == AArch64::GPRRegBankID) {
395 if (RB.getID() == AArch64::FPRRegBankID) {
415 unsigned RegBankID = RB.getID();
476 switch (RB.getID()) {
688 assert((DstSize <= 64 || DstBank.getID() == AArch64::FPRRegBankID) &&
938 bool IsFP = (RBI.getRegBank(I.getOperand(0).getReg(), MRI, TRI)->getID() !=
1339 if (RB.getID() != AArch64::GPRRegBankID)
2012 if (RB.getID() != AArch64::FPRRegBankID) {
2032 if (RB.getID() != AArch64::GPRRegBankID) {
2116 assert(SrcRB.getID()
[all...]
/freebsd-13-stable/contrib/llvm-project/lld/MachO/
H A DDriver.cpp304 if (opt.getGroup().getID() == OPT_grp_deprecated) {
313 switch (opt.getGroup().getID()) {
383 switch (arg->getOption().getID()) {
/freebsd-13-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DExplodedGraph.cpp287 getFirstPred()->getState()->getID() == getState()->getID() &&
498 N->getID(), N->isSink());
H A DEnvironment.cpp272 << "{ \"stmt_id\": " << S->getID(Ctx) << ", \"pretty\": ";
/freebsd-13-stable/contrib/llvm-project/clang/lib/Frontend/
H A DLogDiagnosticPrinter.cpp129 DE.DiagnosticID = Info.getID();
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetPassConfig.h67 AnalysisID getID() const { function in class:llvm::IdentifyingPassPtr
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegisterClassInfo.cpp92 RCInfo &RCI = RegClass[RC->getID()];
H A DTargetPassConfig.cpp308 Pass *NP = Pass::createPass(InsertedPassID.getID());
442 TargetPassID != InsertedPassID.getID()) ||
517 FinalPtr.getID() != ID;
584 P = Pass::createPass(FinalPtr.getID());
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyPeephole.cpp98 switch (RegClass->getID()) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGRRList.cpp326 RegClass = RC->getID();
335 RegClass = RC->getID();
343 RegClass = RC->getID();
348 RegClass = TLI->getRepRegClassFor(VT)->getID();
1768 RegLimit[RC->getID()] = tri->getRegPressureLimit(RC, MF);
2074 unsigned Id = RC->getID();
2119 unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
2150 unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
2165 unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
2273 unsigned RCId = TLI->getRepRegClassFor(VT)->getID();
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DGICombinerEmitter.cpp198 RuleID getID() const { return ID; } function in class:__anon4936::CombineRule
331 format("__anon%" PRIu64 "_%u", Rule.getID(), Rule.allocUID())));
340 format("__anonpred%" PRIu64 "_%u", Rule.getID(), Rule.allocUID())));
638 SS << "return " << EnumeratedRule.getID() << ";\n";
746 << Indent << "if (!RuleConfig->isRuleDisabled(" << Rule->getID()
/freebsd-13-stable/contrib/llvm-project/clang/lib/ARCMigrate/
H A DARCMT.cpp39 llvm::is_contained(IDs, I->getID())) &&
68 llvm::find(IDs, I->getID()) != IDs.end()) &&
135 if (DiagnosticIDs::isARCDiagnostic(Info.getID()) ||
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMRegisterBankInfo.cpp52 PM.RegBank->getID() == RegBankID;
182 switch (RC.getID()) {
477 (Mapping.RegBank->getID() != ARM::FPRRegBankID ||
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Option/
H A DOptTable.cpp95 OptSpecifier::OptSpecifier(const Option *Opt) : ID(Opt->getID()) {}
162 unsigned id = Opt.getID();
566 HelpText = getOptionHelpText(Alias.getID());
/freebsd-13-stable/contrib/llvm-project/lldb/source/Utility/
H A DProcessInfo.cpp196 uint32_t (ProcessInstanceInfo::*getID)() const,
204 uint32_t id = (this->*getID)();
/freebsd-13-stable/contrib/llvm-project/lld/COFF/
H A DDriver.cpp374 switch (arg->getOption().getID()) {
616 switch (arg->getOption().getID()) {
719 if (arg->getOption().getID() == osFile.getID())
722 assert(arg->getOption().getID() == os.getID());
1318 dynamicBaseArg->getOption().getID() == OPT_dynamicbase_no)
1327 dynamicBaseArg->getOption().getID() == OPT_dynamicbase) {
1389 if (arg->getOption().getID() == OPT_repro) {
1534 if (arg->getOption().getID()
[all...]
/freebsd-13-stable/contrib/llvm-project/clang/include/clang/ASTMatchers/
H A DASTMatchFinder.h112 virtual StringRef getID() const;
/freebsd-13-stable/contrib/llvm-project/clang/lib/Basic/
H A DDiagnostic.cpp483 CurDiagID = storedDiag.getID();
513 = Diags->getDiagnosticLevel(Info.getID(), Info.getLocation(), *this);
776 getDiags()->getDiagnosticIDs()->getDescription(getID());
1097 : ID(Info.getID()), Level(Level) {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonMachineScheduler.h192 return Available.getID() == ConvergingVLIWScheduler::TopQID;

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