| /freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | AggressiveAntiDepBreaker.cpp | 718 MachineInstr *DefMI = Q.second.Operand->getParent();
719 if (DefMI->readsRegister(NewReg, TRI)) {
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| H A D | MachinePipeliner.cpp | 870 MachineInstr *DefMI = MRI.getUniqueVRegDef(Reg); local
871 if (DefMI == nullptr)
873 SUnit *SU = getSUnit(DefMI);
874 if (SU != nullptr && DefMI->isPHI()) {
925 MachineInstr *DefMI = MRI.getUniqueVRegDef(OrigBase); local
926 if (!DefMI)
928 SUnit *DefSU = getSUnit(DefMI);
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| H A D | InlineSpiller.cpp | 407 MachineInstr *DefMI = LIS.getInstructionFromIndex(SrcVNI->def); local
408 assert(DefMI && "Defining instruction disappeared");
409 MII = DefMI;
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| H A D | SplitKit.cpp | 444 const MachineInstr *DefMI = LIS.getInstructionFromIndex(Def); local
445 assert(DefMI != nullptr);
447 for (const MachineOperand &DefOp : DefMI->defs()) {
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| H A D | MachineScheduler.cpp | 1334 MachineInstr *DefMI = LIS->getInstructionFromIndex(DefVNI->def); local
1335 const SUnit *DefSU = getSUnit(DefMI);
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCReduceCRLogicals.cpp | 68 MachineInstr *DefMI = MRI->getVRegDef(MI.getOperand(i - 1).getReg()); local
69 if (DefMI->getParent() == NewMBB ||
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.cpp | 609 bool SystemZInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, argument
612 unsigned DefOpc = DefMI.getOpcode();
616 if (DefMI.getOperand(0).getReg() != Reg)
618 int32_t ImmVal = (int32_t)DefMI.getOperand(1).getImm();
668 DefMI.eraseFromParent();
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 1267 MachineInstr *DefMI = Fold.OpToFold->getParent(); local
1268 if (DefMI->readsRegister(AMDGPU::EXEC, TRI) &&
1269 execMayBeModifiedBeforeUse(*MRI, Reg, *DefMI, *Fold.UseMI))
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| H A D | SIInstrInfo.cpp | 2531 bool SIInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, argument
2536 switch (DefMI.getOpcode()) {
2550 const MachineOperand *ImmOp = getNamedOperand(DefMI, AMDGPU::OpName::src0);
2669 DefMI.eraseFromParent();
2752 DefMI.eraseFromParent();
6999 const MachineInstr &DefMI,
7004 auto *DefBB = DefMI.getParent();
7016 for (auto I = std::next(DefMI.getIterator()); I != E; ++I) {
7032 const MachineInstr &DefMI) {
7036 auto *DefBB = DefMI
6997 execMayBeModifiedBeforeUse(const MachineRegisterInfo &MRI, Register VReg, const MachineInstr &DefMI, const MachineInstr &UseMI) argument
7030 execMayBeModifiedBeforeAnyUse(const MachineRegisterInfo &MRI, Register VReg, const MachineInstr &DefMI) argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 98 MachineInstrBuilder &DefMI) {
107 DefMI.add(MO);
97 transferImpOps(MachineInstr &OldMI, MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 957 MachineInstr *DefMI = &*I; local
958 if (DefMI->getOpcode() != X86::MOVPC32r)
4316 MachineInstr *&DefMI) const {
4317 // Check whether we can move DefMI here.
4318 DefMI = MRI->getVRegDef(FoldAsLoadDefReg);
4319 assert(DefMI);
4321 if (!DefMI->isSafeToMove(nullptr, SawStore))
4342 if (MachineInstr *FoldMI = foldMemoryOperand(MI, SrcOperandIds, *DefMI)) {
7913 const MachineInstr &DefMI,
7917 return isHighLatencyDef(DefMI
7911 hasHighOperandLatency(const TargetSchedModel &SchedModel, const MachineRegisterInfo *MRI, const MachineInstr &DefMI, unsigned DefIdx, const MachineInstr &UseMI, unsigned UseIdx) const argument
[all...] |
| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 4218 const MachineInstr &DefMI,
4225 const MachineOperand &DefMO = DefMI.getOperand(DefIdx);
4230 int Idx = DefMI.findRegisterDefOperandIdx(*SR, false, false, &HRI);
4250 int Latency = TargetInstrInfo::getOperandLatency(ItinData, DefMI, DefIdx,
4217 getOperandLatency(const InstrItineraryData *ItinData, const MachineInstr &DefMI, unsigned DefIdx, const MachineInstr &UseMI, unsigned UseIdx) const argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 62 MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI);
125 MachineInstrBuilder &DefMI) {
134 DefMI.add(MO);
123 TransferImpOps(MachineInstr &OldMI, MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI) argument
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| /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 4080 auto IsCMN = [&](MachineInstr *DefMI, const AArch64CC::CondCode &CC) {
4081 if (!DefMI || DefMI->getOpcode() != TargetOpcode::G_SUB)
4089 if (DefMI->getOpcode() != TargetOpcode::G_SUB)
4095 getConstantVRegValWithLookThrough(DefMI->getOperand(1).getReg(), MRI);
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