Searched refs:phy (Results 151 - 175 of 265) sorted by relevance

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/freebsd-12-stable/sys/arm64/rockchip/
H A Drk_dwc3.c54 #include <dev/extres/phy/phy_usb.h>
/freebsd-12-stable/sys/dev/cas/
H A Dif_cas.c150 static int cas_mii_readreg(device_t dev, int phy, int reg);
152 static int cas_mii_writereg(device_t dev, int phy, int reg, int val);
2149 cas_mii_readreg(device_t dev, int phy, int reg) argument
2156 printf("%s: phy %d reg %d\n", __func__, phy, reg);
2189 (phy << CAS_MIF_FRAME_PHY_SHFT) |
2207 cas_mii_writereg(device_t dev, int phy, int reg, int val) argument
2214 printf("%s: phy %d reg %d val %x\n", phy, reg, val, __func__);
2267 (phy << CAS_MIF_FRAME_PHY_SHF
2659 u_int j, k, lma, pcs[4], phy; local
[all...]
/freebsd-12-stable/usr.sbin/config/
H A Dmain.c276 struct stat lg, phy; local
292 if (stat(pwd, &lg) != -1 && stat(srcdir, &phy) != -1 &&
293 lg.st_dev == phy.st_dev && lg.st_ino == phy.st_ino)
/freebsd-12-stable/sys/dev/mpr/
H A Dmpr_sas_lsi.c214 MPI2_EVENT_SAS_TOPO_PHY_ENTRY *phy; local
223 phy = &data->PHY[i];
224 switch (phy->PhyStatus & MPI2_EVENT_SAS_TOPO_RC_MASK) {
227 le16toh(phy->AttachedDevHandle),
228 phy->LinkRate)) {
232 le16toh(phy->AttachedDevHandle));
234 phy->AttachedDevHandle));
239 phy->AttachedDevHandle));
/freebsd-12-stable/sys/cam/scsi/
H A Dscsi_enc_ses.c760 ses_elm_sas_dev_phy_sata_dev(struct ses_elm_sas_device_phy *phy) argument
762 return ((phy)->target_ports & 0x1);
765 ses_elm_sas_dev_phy_sata_port(struct ses_elm_sas_device_phy *phy) argument
767 return ((phy)->target_ports >> 7);
770 ses_elm_sas_dev_phy_dev_type(struct ses_elm_sas_device_phy *phy) argument
772 return (((phy)->byte0 >> 4) & 0x7);
2300 struct ses_elm_sas_device_phy *phy; local
2314 phy = &addl->proto_data.sasdev_phys[i];
2315 sbuf_printf(sbp, "%s: phy %d:", sesname, i);
2316 if (ses_elm_sas_dev_phy_sata_dev(phy))
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/freebsd-12-stable/sys/dev/ath/ath_rate/sample/
H A Dsample.c188 if (rt->info[rix0].phy != IEEE80211_T_HT) {
299 return rt->info[rix].phy == IEEE80211_T_HT ?
308 return rt->info[rix].phy == IEEE80211_T_HT ? "MCS" : "Mb ";
333 (rt->info[rix].phy != IEEE80211_T_HT)) {
463 (rt->info[rix].phy != IEEE80211_T_HT)) {
590 if (rt->info[rix].phy == IEEE80211_T_HT)
632 if (rt->info[rix].phy == IEEE80211_T_HT)
636 if (rt->info[rix].phy != IEEE80211_T_HT)
860 (rt->info[best_rix].phy == IEEE80211_T_HT) ?
1473 if (rt->info[y].phy
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/freebsd-12-stable/sys/dev/gem/
H A Dif_gem.c155 int error, i, phy; local
300 phy = GEM_PHYAD_EXTERNAL;
303 phy = MII_PHY_ANY;
307 gem_mediachange, gem_mediastatus, BMSR_DEFCAPMASK, phy,
325 phy = GEM_PHYAD_INTERNAL;
328 phy = GEM_PHYAD_EXTERNAL;
331 phy = MII_PHY_ANY;
335 gem_mediachange, gem_mediastatus, BMSR_DEFCAPMASK, phy,
1875 gem_mii_readreg(device_t dev, int phy, int reg) argument
1882 printf("%s: phy
1933 gem_mii_writereg(device_t dev, int phy, int reg, int val) argument
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/freebsd-12-stable/sys/dev/e1000/
H A Dif_em.c999 hw->phy.autoneg_wait_to_complete = FALSE;
1000 hw->phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1007 if (hw->phy.media_type == e1000_media_type_copper) {
1008 hw->phy.mdix = AUTO_ALL_MODES;
1009 hw->phy.disable_polarity_correction = FALSE;
1010 hw->phy.ms_type = EM_MASTER_SLAVE;
1389 adapter->hw.phy.media_type == e1000_media_type_copper) {
1581 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) ||
1582 (adapter->hw.phy.media_type == e1000_media_type_internal_serdes)) {
1627 adapter->hw.phy
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/freebsd-12-stable/sys/dev/lge/
H A Dif_lge.c273 lge_miibus_readreg(dev, phy, reg)
275 int phy, reg;
287 if (sc->lge_pcs == 0 && phy == 0)
290 CSR_WRITE_4(sc, LGE_GMIICTL, (phy << 8) | reg | LGE_GMIICMD_READ);
305 lge_miibus_writereg(dev, phy, reg, data)
307 int phy, reg, data;
315 (data << 16) | (phy << 8) | reg | LGE_GMIICMD_WRITE);
/freebsd-12-stable/sys/dev/isci/scil/
H A Dscic_sds_controller.c99 * The number of milliseconds to wait for a phy to start.
104 * The number of milliseconds to wait while a given phy is consuming
178 * @brief This timer is used to start another phy after we have given up on
179 * the previous phy to transition to the ready state.
203 * This method initializes the phy startup operations for controller start.
724 * Initialize the AFE for this phy index.
1581 * object for which to start the next phy.
1649 * start the next phy on the controller. If all the phys have
1655 * object for which to start the next phy.
1697 // The PHY was never added to a PORT in MPC mode so start the next phy i
2185 SCIC_SDS_PHY_T * phy; local
2268 SCIC_SDS_PHY_T *phy; local
3789 SCIC_SDS_PHY_T * phy; local
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/freebsd-12-stable/sys/dev/usb/net/
H A Dif_udav.c478 * XXX: force select internal phy.
479 * external phy routines are not tested.
802 udav_miibus_readreg(device_t dev, int phy, int reg) argument
810 if (phy != 0)
834 DPRINTFN(11, "phy=%d reg=0x%04x => 0x%04x\n",
835 phy, reg, data16);
843 udav_miibus_writereg(device_t dev, int phy, int reg, int data) argument
850 if (phy != 0)
H A Dif_axge.c283 axge_miibus_readreg(device_t dev, int phy, int reg) argument
294 val = axge_read_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy);
303 axge_miibus_writereg(device_t dev, int phy, int reg, int val) argument
313 axge_write_cmd_2(sc, AXGE_ACCESS_PHY, reg, phy, val);
H A Dif_mos.c423 mos_miibus_readreg(device_t dev, int phy, int reg) argument
436 mos_reg_write_1(sc, MOS_PHY_CTL, (phy & MOS_PHYCTL_PHYADDR) |
456 mos_miibus_writereg(device_t dev, int phy, int reg, int val) argument
466 mos_reg_write_1(sc, MOS_PHY_CTL, (phy & MOS_PHYCTL_PHYADDR) |
/freebsd-12-stable/sys/arm/nvidia/
H A Dtegra_usbphy.c32 * USB phy driver for Tegra SoCs.
47 #include <dev/extres/phy/phy.h>
298 {"nvidia,tegra30-usb-phy", 1},
303 static int usbphy_phy_enable(struct phynode *phy, bool enable);
347 device_printf(sc->dev, "USB phy clock timeout.\n");
359 /* Reset phy */
567 usbphy_phy_enable(struct phynode *phy, bool enable) argument
573 dev = phynode_get_device(phy);
606 device_printf(dev, "Unsupported phy typ
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/freebsd-12-stable/sys/arm/ti/cpsw/
H A Dif_cpsw.c121 static int cpswp_miibus_readreg(device_t, int phy, int reg);
122 static int cpswp_miibus_writereg(device_t, int phy, int reg, int value);
742 int len, phy, vlan; local
747 /* Find any slave with phy-handle/phy_id */
748 phy = -1;
763 if (fdt_get_phyaddr(child, NULL, &phy, NULL) != 0){
765 phy = -1;
768 /* Get phy address from fdt */
770 phy = phy_id[1];
776 /* Get phy addres
1473 cpswp_miibus_readreg(device_t dev, int phy, int reg) argument
1502 cpswp_miibus_writereg(device_t dev, int phy, int reg, int value) argument
2983 cpsw_readphy(device_t dev, int phy, int reg) argument
2991 cpsw_writephy(device_t dev, int phy, int reg, int data) argument
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/freebsd-12-stable/sys/dev/ice/
H A Dice_lib.c717 switch (pi->phy.link_info.link_speed) {
755 switch (pi->phy.link_info.link_speed) {
968 uint64_t phy_low = pi->phy.phy_type_low;
969 uint64_t phy_high = pi->phy.phy_type_high;
1075 * Looks up the supported phy types, and initializes the various media types
1923 pi->phy.get_link_info = true;
1926 if (pi->phy.link_info.topo_media_conflict &
1932 if ((pi->phy.link_info.link_info & ICE_AQ_MEDIA_AVAILABLE) &&
1933 !(pi->phy.link_info.link_info & ICE_AQ_LINK_UP) &&
1934 !(pi->phy
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/freebsd-12-stable/sys/dev/ral/
H A Drt2860.c1189 uint16_t phy; local
1296 phy = le16toh(rxwi->phy);
1297 switch (phy & RT2860_PHY_MODE) {
1299 switch ((phy & RT2860_PHY_MCS) & ~RT2860_PHY_SHPRE) {
1305 if (phy & RT2860_PHY_SHPRE)
1309 switch (phy & RT2860_PHY_MCS) {
1527 if (rt2860_rates[ridx].phy == IEEE80211_T_DS) {
1528 txwi->phy = htole16(RT2860_PHY_CCK);
1533 txwi->phy
[all...]
/freebsd-12-stable/sys/dev/wb/
H A Dif_wb.c380 wb_miibus_readreg(dev, phy, reg)
382 int phy, reg;
385 return (mii_bitbang_readreg(dev, &wb_mii_bitbang_ops, phy, reg));
389 wb_miibus_writereg(dev, phy, reg, data)
391 int phy, reg, data;
394 mii_bitbang_writereg(dev, &wb_mii_bitbang_ops, phy, reg, data);
725 * Delete any miibus and phy devices attached to this interface.
/freebsd-12-stable/sys/arm/nvidia/tegra124/
H A Dtegra124_xusbpadctl.c42 #include <dev/extres/phy/phy.h>
356 static int xusbpadctl_phy_enable(struct phynode *phy, bool enable);
445 device_printf(sc->dev, "Failed to power up PCIe phy\n");
504 device_printf(sc->dev, "Failed to power up SATA phy\n");
695 xusbpadctl_phy_enable(struct phynode *phy, bool enable) argument
704 dev = phynode_get_device(phy);
705 id = phynode_get_id(phy);
709 device_printf(dev, "Unknown phy: %d\n", id);
917 /* Create and register phy
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/freebsd-12-stable/contrib/wpa/src/ap/
H A Dhostapd.h422 char phy[16]; /* Name of the PHY (radio) */ member in struct:hostapd_iface
589 hostapd_interface_init_bss(struct hapd_interfaces *interfaces, const char *phy,
H A Dhostapd.c1528 if (!iface->phy[0]) {
1529 const char *phy = hostapd_drv_get_radio_name(hapd); local
1530 if (phy) {
1531 wpa_printf(MSG_DEBUG, "phy: %s", phy);
1532 os_strlcpy(iface->phy, phy, sizeof(iface->phy));
2421 hostapd_interface_init_bss(struct hapd_interfaces *interfaces, const char *phy, argument
2429 if (!phy || !*ph
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/freebsd-12-stable/sys/dev/rl/
H A Dif_rl.c392 rl_miibus_readreg(device_t dev, int phy, int reg) argument
428 device_printf(sc->rl_dev, "bad phy register\n");
434 return (mii_bitbang_readreg(dev, &rl_mii_bitbang_ops, phy, reg));
438 rl_miibus_writereg(device_t dev, int phy, int reg, int data) argument
467 device_printf(sc->rl_dev, "bad phy register\n");
474 mii_bitbang_writereg(dev, &rl_mii_bitbang_ops, phy, reg, data);
645 int error = 0, hwrev, i, phy, pmc, rid; local
795 phy = MII_PHY_ANY;
797 phy = RL_PHYAD_INTERNAL;
799 rl_ifmedia_sts, BMSR_DEFCAPMASK, phy, MII_OFFSET_AN
[all...]
/freebsd-12-stable/sys/dev/tx/
H A Dif_tx.c1808 epic_read_phy_reg(epic_softc_t *sc, int phy, int reg) argument
1812 CSR_WRITE_4(sc, MIICTL, ((reg << 4) | (phy << 9) | 0x01));
1824 epic_write_phy_reg(epic_softc_t *sc, int phy, int reg, int val) argument
1829 CSR_WRITE_4(sc, MIICTL, ((reg << 4) | (phy << 9) | 0x02));
1839 epic_miibus_readreg(device_t dev, int phy, int reg) argument
1845 return (PHY_READ_2(sc, phy, reg));
1849 epic_miibus_writereg(device_t dev, int phy, int reg, int data) argument
1855 PHY_WRITE_2(sc, phy, reg, data);
/freebsd-12-stable/sys/net80211/
H A Dieee80211_proto.c1484 _setifsparams(struct wmeParams *wmep, const paramType *phy) argument
1486 wmep->wmep_aifsn = phy->aifsn;
1487 wmep->wmep_logcwmin = phy->logcwmin;
1488 wmep->wmep_logcwmax = phy->logcwmax;
1489 wmep->wmep_txopLimit = phy->txopLimit;
1494 struct wmeParams *wmep, const paramType *phy)
1496 wmep->wmep_acm = phy->acm;
1497 _setifsparams(wmep, phy);
1493 setwmeparams(struct ieee80211vap *vap, const char *type, int ac, struct wmeParams *wmep, const paramType *phy) argument
/freebsd-12-stable/sys/dev/xilinx/
H A Dif_xae.c158 if (OF_getencprop(node, "phy-handle", (void *)&phy_handle,
696 xae_miibus_read_reg(device_t dev, int phy, int reg) argument
709 mii |= (phy << MDIO_TX_PHYAD_S);
722 xae_miibus_write_reg(device_t dev, int phy, int reg, int val) argument
734 mii |= (phy << MDIO_TX_PHYAD_S);

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