/freebsd-12-stable/contrib/gcc/config/rs6000/ |
H A D | darwin-vecsave.asm | 36 save/restore requires 2 instructions (8 bytes.) 41 (4 bytes) to do the operation; for Vector regs, 2 instructions are
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H A D | darwin-fpsave.asm | 38 (4 bytes) to do the operation; for Vector regs, 2 instructions are
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H A D | darwin-tramp.asm | 81 /* Copy the instructions to the stack */
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H A D | tramp.asm | 84 /* Copy the instructions to the stack */
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | MIRCanonicalizerPass.cpp | 20 // Reorders instructions canonically. 96 rescheduleLexographically(std::vector<MachineInstr *> instructions, argument 104 for (auto *II : instructions) { 152 // Pre-Populate vector of instructions to reschedule so that we don't 327 // Not folding COPY instructions if regbankselect has not set the RCs.
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H A D | InterleavedAccessPass.cpp | 20 // intrinsics can be easily matched into target specific instructions later in 116 /// extractelement instructions in \p Extracts can be replaced by uses of the 117 /// shufflevector instructions in \p Shuffles instead. If so, the necessary 290 // users that are extractelement instructions, we save them to later check if 336 // Try and modify users of the load that are extractelement instructions to 337 // use the shufflevector instructions instead of the load. 357 // If there aren't any extractelement instructions to modify, there's nothing 362 // Maps extractelement instructions to vector-index pairs. The extractlement 363 // instructions will be modified to use the new vector and index operands. 373 // of the shufflevector instructions instea [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | DivergenceAnalysis.cpp | 384 // propagate control divergence to affected instructions 424 // iterate instructions using instructions() to ensure a deterministic order. 425 for (auto &I : instructions(F)) { 438 for (auto &I : instructions(F)) {
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H A D | MustExecute.cpp | 57 // Iterate over loop instructions and compute safety info. 278 // Fast path: there are no instructions before header. 344 "print the must-be-executed-contexed for all instructions", false, true) 350 "print the must-be-executed-contexed for all instructions", 378 for (Instruction &I : instructions(F)) { 411 for (auto &I: instructions(F)) { 424 for (auto &I: instructions(F)) { 583 // are: infinite loops and instructions that do not necessarily transfer 620 // Make sure the block has no instructions that could stop control
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H A D | CGSCCPassManager.cpp | 450 for (Instruction &I : instructions(F)) 472 for (Instruction &I : instructions(F))
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H A D | LegacyDivergenceAnalysis.cpp | 132 for (auto &I : instructions(F)) { 386 llvm_unreachable("Only arguments and instructions can be divergent"); 394 // Dumps all divergent values in F, arguments and then instructions. 399 // Iterate instructions using instructions() to ensure a deterministic order.
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/freebsd-12-stable/contrib/gcc/config/ia64/ |
H A D | crti.asm | 35 # .init sections. Users may put any desired instructions in those
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H A D | crtend.asm | 56 * the long branch instructions, and we do not wish every program to
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | Debugify.cpp | 120 // Skip void-valued instructions. 235 for (Instruction &I : instructions(F)) { 255 for (Instruction &I : instructions(F)) { 316 /// FunctionPass for attaching synthetic debug info to instructions within a
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/freebsd-12-stable/contrib/gcc/config/arm/ |
H A D | crti.asm | 35 # .init sections. Users may put any desired instructions in those
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/freebsd-12-stable/contrib/gcc/config/sparc/ |
H A D | sol2-ci.asm | 37 ! .init sections. Users may put any desired instructions in those
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/FuzzMutate/ |
H A D | IRMutator.cpp | 155 for (Instruction &Inst : instructions(F)) { 156 // TODO: We can't handle these instructions.
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
H A D | BoundsChecking.cpp | 50 /// Gets the conditions under which memory accessing instructions will overflow. 109 /// Adds run-time bounds checks to memory accessing instructions. 151 // touching instructions 153 for (Instruction &I : instructions(F)) {
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Coroutines/ |
H A D | Coroutines.cpp | 102 // Creates a sequence of instructions to obtain a resume function address using 193 for (Instruction &I : instructions(F)) 256 for (Instruction &I : instructions(F)) {
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/freebsd-12-stable/crypto/openssl/ |
H A D | NOTES.PERL | 47 README.vms and follow the instructions. Another way is to download a
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/freebsd-12-stable/contrib/sqlite3/tea/win/ |
H A D | makefile.vc | 27 the environment. Jump to this line to read the new instructions. 45 # vcvars32.bat according to the instructions for it. This can also turn on
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTDC.cpp | 9 // This pass looks for instructions that can be replaced by a Test Data Class 27 // 1. All fcmp and icmp instructions in a function are checked for a match 31 // 2. All and/or/xor i1 instructions whose both operands have been already 33 // as a queue of instructions to check. 34 // 3. All mapped instructions that are considered worthy of conversion (ie. 37 // 4. All intermediate results of replaced instructions are removed if unused. 76 // Maps seen instructions that can be mapped to a TDC, values are 79 // The queue of and/or/xor i1 instructions to be potentially folded. 317 // Look for icmp+fcmp instructions. 318 for (auto &I : instructions( [all...] |
/freebsd-12-stable/sys/conf/ |
H A D | kern.mk | 132 # We generally don't want fpu instructions in the kernel. 194 # Also explicitly disable Altivec instructions inside the kernel.
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/freebsd-12-stable/sys/dev/safexcel/ |
H A D | safexcel_var.h | 75 /* Inline instructions or IV. */ 91 * region (e.g., instructions). 228 * data processing instructions with the encodings defined below. 233 uint32_t instructions : 9; member in struct:safexcel_instr 237 /* Type 1, operational data instructions. */ 245 /* Type 2, IP header instructions. */ 249 /* Type 3, postprocessing instructions. */ 252 /* Type 4, result instructions. */ 254 /* Type 5, context control instructions. */ 256 /* Type 6, context control instructions [all...] |
/freebsd-12-stable/contrib/llvm-project/libunwind/src/ |
H A D | DwarfParser.hpp | 83 /// by "running" the DWARF FDE "instructions" 114 static bool parseInstructions(A &addressSpace, pint_t instructions, 352 /// "run" the DWARF instructions and create the abstact PrologInfo for an FDE 362 // parse CIE then FDE instructions 372 /// "run" the DWARF instructions 374 bool CFI_Parser<A>::parseInstructions(A &addressSpace, pint_t instructions, 379 pint_t p = instructions; 383 _LIBUNWIND_TRACE_DWARF("parseInstructions(instructions=0x%0" PRIx64 ")\n", 683 // The same constant is used to represent different instructions on
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86DomainReassignment.cpp | 10 // and convert them to equivalent instructions in a different domain, 111 /// For example, PHI instructions can be safely ignored since only the registers 165 // Assuming instructions have the same cost. 201 // Assuming instructions have the same cost, and that COPY is in the same 207 /// An Instruction Converter for replacing COPY instructions. 290 /// the closure, as well as all of the instructions connected by those edges. 297 /// used in a memory operand) excludes the instructions that contain memory 348 ArrayRef<MachineInstr *> instructions() const { function in class:__anon5446::Closure 383 /// All instructions that are included in some closure. 486 for (auto *MI : C.instructions()) [all...] |