/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZRegisterInfo.cpp | 328 .addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ExpandPseudo.cpp | 324 BuildMI(MBB, MBBI, DL, TII->get(X86::POP32r)).addReg(X86::ECX, RegState::Define);
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H A D | X86FastISel.cpp | 1287 MIB.addReg(RetRegs[i], RegState::Implicit); 1840 .addReg(CReg, RegState::Kill); 2641 .addReg(InputReg, RegState::Kill); 2663 .addReg(InputReg, RegState::Kill); 2790 // FIXME may need to add RegState::Debug to any registers produced, 3526 MIB.addReg(X86::EBX, RegState::Implicit); 3529 MIB.addReg(X86::AL, RegState::Implicit); 3533 MIB.addReg(Reg, RegState::Implicit);
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H A D | X86FlagsCopyLowering.cpp | 851 .addDef(TmpReg, RegState::Dead)
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 9531 .addReg(NewVReg1, RegState::Kill) 9537 .addReg(NewVReg2, RegState::Kill) 9540 .addReg(NewVReg3, RegState::Kill) 9560 .addReg(NewVReg1, RegState::Kill) 9565 .addReg(ARM::CPSR, RegState::Define) 9570 .addReg(ARM::CPSR, RegState::Define) 9571 .addReg(NewVReg2, RegState::Kill) 9572 .addReg(NewVReg3, RegState::Kill) 9579 .addReg(NewVReg4, RegState::Kill) 9580 .addReg(NewVReg5, RegState [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 3157 .addReg(Reg, RegState::Kill) 3220 .addReg(CondReg, RegState::Kill); 3231 .addReg(CurrentIdxReg, RegState::Kill) 3238 .addReg(IdxReg, RegState::Kill) 3245 .addReg(CurrentIdxReg, RegState::Kill); 3248 .addReg(CurrentIdxReg, RegState::Kill) 3373 .addReg(Tmp, RegState::Kill) 3424 .addReg(SrcReg, RegState::Undef, SubReg) 3425 .addReg(SrcReg, RegState::Implicit) 3426 .addReg(AMDGPU::M0, RegState [all...] |
H A D | GCNDPPCombine.cpp | 184 DPPInst.addReg(CombOldVGPR.Reg, Def ? 0 : RegState::Undef,
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H A D | SIFoldOperands.cpp | 263 .addReg(AMDGPU::VCC, RegState::Kill); 742 B.addReg(Src.Reg, Def->isUndef() ? RegState::Undef : 0,
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H A D | SIInsertWaitcnts.cpp | 1184 .addReg(AMDGPU::SGPR_NULL, RegState::Undef) 1618 .addReg(AMDGPU::SGPR_NULL, RegState::Undef)
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H A D | AMDGPUCallLowering.cpp | 63 MIB.addUse(PhysReg, RegState::Implicit);
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H A D | SIFixSGPRCopies.cpp | 312 .addReg(TmpReg, RegState::Kill);
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H A D | SIMemoryLegalizer.cpp | 1113 .addReg(AMDGPU::SGPR_NULL, RegState::Undef)
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H A D | R600ISelLowering.cpp | 410 .addReg(R600::PREDICATE_BIT, RegState::Kill); 424 .addReg(R600::PREDICATE_BIT, RegState::Kill);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | IfConversion.cpp | 1507 MIB.addReg(Reg, RegState::Implicit); 1514 MIB.addReg(Reg, RegState::Implicit | RegState::Define); 1518 MIB.addReg(Reg, RegState::Implicit); 1528 MIB.addReg(Reg, RegState::Implicit);
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H A D | MachineInstr.cpp | 2022 auto MIB = BuildMI(MF, DL, MCID).addReg(Reg, RegState::Debug); 2026 MIB.addReg(0U, RegState::Debug); 2045 MIB.addReg(0U, RegState::Debug);
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H A D | MachineBasicBlock.cpp | 518 .addReg(PhysReg, RegState::Kill);
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H A D | TwoAddressInstructionPass.cpp | 1839 .addReg(DstReg, RegState::Define, SubIdx)
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVFrameLowering.cpp | 97 .addReg(ScratchReg, RegState::Kill)
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | InstructionSelectorImpl.h | 831 OutMIs[InsnID].addDef(RegNum, RegState::Implicit); 842 OutMIs[InsnID].addUse(RegNum, RegState::Implicit);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 1668 MIB.addReg(RegArgs[II], RegState::Implicit); 1673 MIB.addReg(PPC::X2, RegState::Implicit); 1796 MIB.addReg(RetRegs[i], RegState::Implicit);
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H A D | PPCInstrInfo.cpp | 428 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) 940 .addReg(DestReg, RegState::Kill) 1899 .addReg(PPC::CR0, MIOpC != NewOpC ? RegState::Kill : 0); 2296 .addImm(LII.Imm).addReg(PPC::CR0, RegState::ImplicitDefine);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyRegStackify.cpp | 615 .addReg(Reg, RegState::Define)
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H A D | WebAssemblyFastISel.cpp | 872 MIB.addReg(ResultReg, RegState::Define);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 290 .addReg(SpillList[i].Reg, RegState::Kill)
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64LoadStoreOptimizer.cpp | 980 .addReg(DstRegX, RegState::Define);
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