Searched refs:RegState (Results 76 - 100 of 110) sorted by relevance

12345

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp328 .addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ExpandPseudo.cpp324 BuildMI(MBB, MBBI, DL, TII->get(X86::POP32r)).addReg(X86::ECX, RegState::Define);
H A DX86FastISel.cpp1287 MIB.addReg(RetRegs[i], RegState::Implicit);
1840 .addReg(CReg, RegState::Kill);
2641 .addReg(InputReg, RegState::Kill);
2663 .addReg(InputReg, RegState::Kill);
2790 // FIXME may need to add RegState::Debug to any registers produced,
3526 MIB.addReg(X86::EBX, RegState::Implicit);
3529 MIB.addReg(X86::AL, RegState::Implicit);
3533 MIB.addReg(Reg, RegState::Implicit);
H A DX86FlagsCopyLowering.cpp851 .addDef(TmpReg, RegState::Dead)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp9531 .addReg(NewVReg1, RegState::Kill)
9537 .addReg(NewVReg2, RegState::Kill)
9540 .addReg(NewVReg3, RegState::Kill)
9560 .addReg(NewVReg1, RegState::Kill)
9565 .addReg(ARM::CPSR, RegState::Define)
9570 .addReg(ARM::CPSR, RegState::Define)
9571 .addReg(NewVReg2, RegState::Kill)
9572 .addReg(NewVReg3, RegState::Kill)
9579 .addReg(NewVReg4, RegState::Kill)
9580 .addReg(NewVReg5, RegState
[all...]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp3157 .addReg(Reg, RegState::Kill)
3220 .addReg(CondReg, RegState::Kill);
3231 .addReg(CurrentIdxReg, RegState::Kill)
3238 .addReg(IdxReg, RegState::Kill)
3245 .addReg(CurrentIdxReg, RegState::Kill);
3248 .addReg(CurrentIdxReg, RegState::Kill)
3373 .addReg(Tmp, RegState::Kill)
3424 .addReg(SrcReg, RegState::Undef, SubReg)
3425 .addReg(SrcReg, RegState::Implicit)
3426 .addReg(AMDGPU::M0, RegState
[all...]
H A DGCNDPPCombine.cpp184 DPPInst.addReg(CombOldVGPR.Reg, Def ? 0 : RegState::Undef,
H A DSIFoldOperands.cpp263 .addReg(AMDGPU::VCC, RegState::Kill);
742 B.addReg(Src.Reg, Def->isUndef() ? RegState::Undef : 0,
H A DSIInsertWaitcnts.cpp1184 .addReg(AMDGPU::SGPR_NULL, RegState::Undef)
1618 .addReg(AMDGPU::SGPR_NULL, RegState::Undef)
H A DAMDGPUCallLowering.cpp63 MIB.addUse(PhysReg, RegState::Implicit);
H A DSIFixSGPRCopies.cpp312 .addReg(TmpReg, RegState::Kill);
H A DSIMemoryLegalizer.cpp1113 .addReg(AMDGPU::SGPR_NULL, RegState::Undef)
H A DR600ISelLowering.cpp410 .addReg(R600::PREDICATE_BIT, RegState::Kill);
424 .addReg(R600::PREDICATE_BIT, RegState::Kill);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DIfConversion.cpp1507 MIB.addReg(Reg, RegState::Implicit);
1514 MIB.addReg(Reg, RegState::Implicit | RegState::Define);
1518 MIB.addReg(Reg, RegState::Implicit);
1528 MIB.addReg(Reg, RegState::Implicit);
H A DMachineInstr.cpp2022 auto MIB = BuildMI(MF, DL, MCID).addReg(Reg, RegState::Debug);
2026 MIB.addReg(0U, RegState::Debug);
2045 MIB.addReg(0U, RegState::Debug);
H A DMachineBasicBlock.cpp518 .addReg(PhysReg, RegState::Kill);
H A DTwoAddressInstructionPass.cpp1839 .addReg(DstReg, RegState::Define, SubIdx)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVFrameLowering.cpp97 .addReg(ScratchReg, RegState::Kill)
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DInstructionSelectorImpl.h831 OutMIs[InsnID].addDef(RegNum, RegState::Implicit);
842 OutMIs[InsnID].addUse(RegNum, RegState::Implicit);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1668 MIB.addReg(RegArgs[II], RegState::Implicit);
1673 MIB.addReg(PPC::X2, RegState::Implicit);
1796 MIB.addReg(RetRegs[i], RegState::Implicit);
H A DPPCInstrInfo.cpp428 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead))
940 .addReg(DestReg, RegState::Kill)
1899 .addReg(PPC::CR0, MIOpC != NewOpC ? RegState::Kill : 0);
2296 .addImm(LII.Imm).addReg(PPC::CR0, RegState::ImplicitDefine);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp615 .addReg(Reg, RegState::Define)
H A DWebAssemblyFastISel.cpp872 MIB.addReg(ResultReg, RegState::Define);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreFrameLowering.cpp290 .addReg(SpillList[i].Reg, RegState::Kill)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64LoadStoreOptimizer.cpp980 .addReg(DstRegX, RegState::Define);

Completed in 603 milliseconds

12345