/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | Instruction.h | 773 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps, 775 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
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H A D | Constants.h | 897 ConstantExpr(Type *ty, unsigned Opcode, Use *Ops, unsigned NumOps) argument 898 : Constant(ty, ConstantExprVal, Ops, NumOps) {
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
H A D | VPlanSLP.cpp | 187 for (unsigned I = 0, NumOps = VPI->getNumOperands(); I < NumOps; ++I)
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/freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | PredicateExpander.cpp | 106 void PredicateExpander::expandCheckNumOperands(raw_ostream &OS, int NumOps) { argument 108 << (shouldNegate() ? "!= " : "== ") << NumOps; 345 return expandCheckNumOperands(OS, Rec->getValueAsInt("NumOps"));
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H A D | CodeGenInstruction.cpp | 80 unsigned NumOps = 1; local 105 NumOps = NumArgs; 135 NumOps, MIOpInfo); 136 MIOperandNo += NumOps;
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H A D | AsmWriterEmitter.cpp | 362 unsigned NumOps = NumInstOpsHandled[i]; local 369 assert(NumOps <= Inst.Operands.size() && 372 Inst.Operands.begin()+NumOps);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/IR/ |
H A D | Instruction.cpp | 23 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, argument 25 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) { 35 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, argument 37 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
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H A D | Instructions.cpp | 147 unsigned NumOps = e + e / 2; local 148 if (NumOps < 2) NumOps = 2; // 2 op PHI nodes are VERY common. 150 ReservedSpace = NumOps; 3855 unsigned NumOps = getNumOperands(); local 3859 if (2 + (idx + 1) * 2 != NumOps) { 3860 OL[2 + idx * 2] = OL[NumOps - 2]; 3861 OL[2 + idx * 2 + 1] = OL[NumOps - 1]; 3865 OL[NumOps-2].set(nullptr); 3866 OL[NumOps 3877 unsigned NumOps = e*3; local 4027 unsigned NumOps = e*2; local [all...] |
H A D | Metadata.cpp | 480 void *MDNode::operator new(size_t Size, unsigned NumOps) { argument 481 size_t OpSize = NumOps * sizeof(MDOperand); 487 for (MDOperand *E = O - NumOps; O != E; --O)
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTargetTransformInfo.cpp | 1029 unsigned NumOps = local 1033 if (((!Src->isVectorTy() && NumOps == 1) || ST->hasVectorEnhancements2()) && 1051 NumOps *= 2; 1053 return NumOps;
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H A D | SystemZInstrInfo.cpp | 989 unsigned NumOps = MI.getNumOperands(); local 990 for (unsigned I = 1; I < NumOps; ++I) { 1163 unsigned NumOps = MI.getNumExplicitOperands(); local 1174 assert(NumOps == 3 && "Expected two source registers."); 1192 if ((OpNum == NumOps - 1) || NeedsCommute) {
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | AMDGPUInstPrinter.cpp | 939 static bool allOpsDefaultValue(const int* Ops, int NumOps, int Mod, argument 943 for (int I = 0; I < NumOps; ++I) { 959 int NumOps = 0; local 969 Ops[NumOps++] = MI->getOperand(Idx).getImm(); 973 NumOps > 0 && 980 if (allOpsDefaultValue(Ops, NumOps, Mod, IsPacked, HasDstSel)) 984 for (int I = 0; I < NumOps; ++I) {
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ScheduleDAGRRList.cpp | 1365 unsigned NumOps = Node->getNumOperands(); local 1366 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue) 1367 --NumOps; // Ignore the glue operand. 1369 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) { 2821 unsigned NumOps = MCID.getNumOperands() - NumRes; 2822 for (unsigned i = 0; i != NumOps; ++i) { 3066 unsigned NumOps = MCID.getNumOperands() - NumRes; 3067 for (unsigned j = 0; j != NumOps; ++j) {
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H A D | ScheduleDAGSDNodes.cpp | 202 unsigned NumOps = Node->getNumOperands(); local 203 if (Node->getOperand(NumOps-1).getValueType() == MVT::Other) 204 Chain = Node->getOperand(NumOps-1).getNode();
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H A D | LegalizeTypes.cpp | 443 for (unsigned i = 0, NumOps = Node.getNumOperands(); i < NumOps; ++i)
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
H A D | AsmPrinterInlineAsm.cpp | 553 for (unsigned I = InlineAsm::MIOp_FirstOperand, NumOps = MI->getNumOperands(); 554 I < NumOps; ++I) {
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPURegisterBankInfo.cpp | 237 template <unsigned NumOps> 241 const std::array<unsigned, NumOps> RegSrcOpIdx, 242 ArrayRef<OpRegBankEntry<NumOps>> Table) const { 248 unsigned Sizes[NumOps]; 249 for (unsigned I = 0; I < NumOps; ++I) { 262 for (unsigned I = 0; I < NumOps; ++I) { 1200 for (int I = NumDefs, NumOps = MI.getNumOperands(); I != NumOps; ++I) { 2317 const int NumOps = MI.getNumOperands(); local 2318 SmallVector<const ValueMapping *, 8> OpdsMapping(NumOps); [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | Scalarizer.cpp | 771 unsigned NumOps = PHI.getNumOperands(); local 773 Res[I] = Builder.CreatePHI(VT->getElementType(), NumOps, 776 for (unsigned I = 0; I < NumOps; ++I) {
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMConstantIslandPass.cpp | 591 unsigned NumOps = MI->getDesc().getNumOperands(); local 593 MI->getOperand(NumOps - (MI->isPredicable() ? 2 : 1)); 2170 unsigned NumOps = MCID.getNumOperands(); local 2171 unsigned JTOpIdx = NumOps - (MI->isPredicable() ? 2 : 1); 2364 unsigned NumOps = MCID.getNumOperands(); local 2365 unsigned JTOpIdx = NumOps - (MI->isPredicable() ? 2 : 1);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TwoAddressInstructionPass.cpp | 503 for (unsigned i = 0, NumOps = MI.getNumOperands(); i != NumOps; ++i) { 1465 unsigned NumOps = MI->getNumOperands(); local 1467 for (unsigned SrcIdx = 0; SrcIdx < NumOps; ++SrcIdx) {
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H A D | MachineVerifier.cpp | 869 unsigned NumOps; local 870 for (unsigned e = MI->getNumOperands(); OpNo < e; OpNo += NumOps) { 875 NumOps = 1 + InlineAsm::getNumOperandRegisters(MO.getImm()); 921 unsigned NumOps = MI->getNumOperands(); local 925 for (unsigned I = 0, E = std::min(MCID.getNumOperands(), NumOps); 1179 const unsigned NumOps = MI->getNumOperands(); local 1180 if (DstTy.getSizeInBits() != SrcTy.getSizeInBits() * (NumOps - 1)) 1183 for (unsigned I = 2; I != NumOps; ++I) {
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H A D | RDFGraph.cpp | 1284 unsigned NumOps = In.getNumOperands(); local 1292 for (unsigned OpN = 0; OpN < NumOps; ++OpN) { 1320 for (unsigned OpN = 0; OpN < NumOps; ++OpN) { 1337 for (unsigned OpN = 0; OpN < NumOps; ++OpN) { 1366 for (unsigned OpN = 0; OpN < NumOps; ++OpN) {
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FlagsCopyLowering.cpp | 313 for (int OpIdx = 1, NumOps = MI.getNumOperands(); OpIdx < NumOps;
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H A D | X86SpeculativeLoadHardening.cpp | 289 for (int OpIdx = 1, NumOps = MI.getNumOperands(); OpIdx < NumOps; 338 for (int OpIdx = 1, NumOps = MI.getNumOperands(); OpIdx < NumOps;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAGHVX.cpp | 1451 std::map<SDNode*,unsigned> NumOps; 1463 NumOps.insert({S, OpN}); 1473 auto F = NumOps.find(U); 1474 assert(F != NumOps.end());
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