/freebsd-12-stable/sys/contrib/dev/acpica/components/disassembler/ |
H A D | dmresrc.c | 294 * PARAMETERS: Mask - 16-bit value corresponding to 16 interrupt 305 UINT16 Mask) 321 if (Mask & 1) 332 Mask >>= 1; 304 AcpiDmBitList( UINT16 Mask) argument
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | LiveRegUnits.h | 93 /// part of the lanemask \p Mask. 94 void addRegMasked(MCPhysReg Reg, LaneBitmask Mask) { argument 97 if (UnitMask.none() || (UnitMask & Mask).any())
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H A D | MachineOperand.h | 65 MO_RegisterMask, ///< Mask of preserved registers. 66 MO_RegisterLiveOut, ///< Mask of live-out registers. 692 /// Sets value of register mask operand referencing Mask. The 693 /// operand does not take ownership of the memory referenced by Mask, it must 862 /// CreateRegMask - Creates a register mask operand referencing Mask. The 863 /// operand does not take ownership of the memory referenced by Mask, it 874 static MachineOperand CreateRegMask(const uint32_t *Mask) { 875 assert(Mask && "Missing register mask"); 877 Op.Contents.RegMask = Mask; 880 static MachineOperand CreateRegLiveOut(const uint32_t *Mask) { [all...] |
H A D | SwitchLoweringUtils.h | 88 uint64_t Mask = 0; member in struct:llvm::SwitchCG::CaseBits 96 : Mask(mask), BB(bb), Bits(bits), ExtraProb(Prob) {} 191 uint64_t Mask; member in struct:llvm::SwitchCG::BitTestCase 198 : Mask(M), ThisBB(T), TargetBB(Tr), ExtraProb(Prob) {}
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/MCA/ |
H A D | HWEventListener.h | 145 uint64_t Mask = 0) 146 : Reason(reason), AffectedInstructions(Insts), ResourceMask(Mask) {}
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
H A D | LanaiAsmBackend.cpp | 121 uint64_t Mask = local 123 CurVal |= Value & Mask;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
H A D | AggressiveInstCombine.cpp | 155 /// the bit indexes (Mask) needed by a masked compare. If we're matching a chain 160 APInt Mask; member in struct:MaskOps 165 : Root(nullptr), Mask(APInt::getNullValue(BitWidth)), 206 if (BitIndex >= MOps.Mask.getBitWidth()) 210 MOps.Mask.setBit(BitIndex); 245 Constant *Mask = ConstantInt::get(I.getType(), MOps.Mask); local 246 Value *And = Builder.CreateAnd(MOps.Root, Mask); 247 Value *Cmp = MatchAllBitsSet ? Builder.CreateICmpEQ(And, Mask)
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/freebsd-12-stable/contrib/llvm-project/llvm/tools/llvm-mca/Views/ |
H A D | BottleneckAnalysis.cpp | 86 uint64_t Mask = ProcResID2Mask[ProcResID]; local 88 if (Mask == Current) { 94 Mask ^= Current; 95 while (Mask) { 96 uint64_t SubUnit = Mask & (-Mask); 100 Mask ^= SubUnit; 486 uint64_t Mask, unsigned Cost) { 490 DG.addResourceDep(From, To + SourceSize, Mask, Cost); 491 DG.addResourceDep(From + SourceSize, To + (SourceSize * 2), Mask, Cos [all...] |
/freebsd-12-stable/contrib/llvm-project/clang/include/clang/AST/ |
H A D | Type.h | 196 if (!(L.Mask & ~CVRMask) && !(R.Mask & ~CVRMask)) { 198 Q.Mask = L.Mask & R.Mask; 199 L.Mask &= ~Q.Mask; 200 R.Mask &= ~Q.Mask; 230 static Qualifiers fromFastMask(unsigned Mask) { argument 578 uint32_t Mask = 0; member in class:clang::Qualifiers 862 removeLocalFastQualifiers(unsigned Mask) argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelDAGToDAG.cpp | 110 // (or (rotl Input, Rotate), ~Mask) 114 // (and (rotl Input, Rotate), Mask) 122 Mask(allOnes(BitSize)), Input(N), Start(64 - BitSize), End(63), 127 uint64_t Mask; member in struct:__anon5358::RxSBGOperands 275 // Try to update RxSBG so that only the bits of RxSBG.Input in Mask are used. 277 bool refineRxSBGMask(RxSBGOperands &RxSBG, uint64_t Mask) const; 752 uint64_t Mask) const { 755 Mask = (Mask << RxSBG.Rotate) | (Mask >> (6 765 maskMatters(RxSBGOperands &RxSBG, uint64_t Mask) argument 780 uint64_t Mask = allOnes(BitSize); local 795 uint64_t Mask = MaskNode->getZExtValue(); local 818 uint64_t Mask = ~MaskNode->getZExtValue(); local 1007 SDValue Mask = CurDAG->getConstant(RISBG.Mask, DL, VT); local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/ |
H A D | DWARFUnitIndex.cpp | 189 uint64_t Mask = Header.NumBuckets - 1; local 191 auto H = S & Mask; 192 auto HP = ((S >> 32) & Mask) | 1; 194 H = (H + HP) & Mask;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/IR/ |
H A D | ConstantFold.h | 41 Constant *Mask);
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H A D | Instructions.cpp | 1781 ShuffleVectorInst::ShuffleVectorInst(Value *V1, Value *V2, Value *Mask, argument 1785 cast<VectorType>(Mask->getType())->getElementCount()), 1790 assert(isValidOperands(V1, V2, Mask) && 1794 Op<2>() = Mask; 1798 ShuffleVectorInst::ShuffleVectorInst(Value *V1, Value *V2, Value *Mask, argument 1802 cast<VectorType>(Mask->getType())->getElementCount()), 1807 assert(isValidOperands(V1, V2, Mask) && 1812 Op<2>() = Mask; 1836 const Value *Mask) { 1841 // Mask mus 1835 isValidOperands(const Value *V1, const Value *V2, const Value *Mask) argument 1882 getMaskValue(const Constant *Mask, unsigned i) argument 1892 getShuffleMask(const Constant *Mask, SmallVectorImpl<int> &Result) argument 1908 isSingleSourceMaskImpl(ArrayRef<int> Mask, int NumOpElts) argument 1926 isSingleSourceMask(ArrayRef<int> Mask) argument 1932 isIdentityMaskImpl(ArrayRef<int> Mask, int NumOpElts) argument 1944 isIdentityMask(ArrayRef<int> Mask) argument 1950 isReverseMask(ArrayRef<int> Mask) argument 1962 isZeroEltSplatMask(ArrayRef<int> Mask) argument 1974 isSelectMask(ArrayRef<int> Mask) argument 1987 isTransposeMask(ArrayRef<int> Mask) argument 2021 isExtractSubvectorMask(ArrayRef<int> Mask, int NumSrcElts, int &Index) argument [all...] |
H A D | IRBuilder.cpp | 471 /// \p Mask - vector of booleans which indicates what vector lanes should 477 Value *Mask, Value *PassThru, 482 assert(Mask && "Mask should not be all-ones (null)"); 486 Value *Ops[] = { Ptr, getInt32(Align), Mask, PassThru}; 495 /// \p Mask - vector of booleans which indicates what vector lanes should 498 unsigned Align, Value *Mask) { 502 assert(Mask && "Mask should not be all-ones (null)"); 504 Value *Ops[] = { Val, Ptr, getInt32(Align), Mask }; 476 CreateMaskedLoad(Value *Ptr, unsigned Align, Value *Mask, Value *PassThru, const Twine &Name) argument 497 CreateMaskedStore(Value *Val, Value *Ptr, unsigned Align, Value *Mask) argument 528 CreateMaskedGather(Value *Ptrs, unsigned Align, Value *Mask, Value *PassThru, const Twine& Name) argument 559 CreateMaskedScatter(Value *Data, Value *Ptrs, unsigned Align, Value *Mask) argument [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/lib/MCA/Stages/ |
H A D | ExecuteStage.cpp | 132 uint64_t Mask = HWS.analyzeResourcePressure(Insts); local 133 if (Mask) { 136 << format_hex(Mask, 16) << '\n'); 137 HWPressureEvent Ev(HWPressureEvent::RESOURCES, Insts, Mask);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | Thumb2ITBlockPass.cpp | 227 unsigned Mask = 0, Pos = 3; local 245 Mask |= ((NCC ^ CC) & 1) << Pos; 268 Mask |= (1 << Pos); 269 MIB.addImm(Mask);
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/freebsd-12-stable/contrib/llvm-project/clang/lib/Basic/ |
H A D | FixedPoint.cpp | 34 auto Mask = llvm::APInt::getBitsSetFrom( local 37 llvm::APInt Masked(NewVal & Mask); 40 if (!(Masked == Mask || Masked == 0)) { 43 NewVal = NewVal.isNegative() ? Mask : ~Mask;
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineShifts.cpp | 457 APInt Mask = APInt::getLowBitsSet(TypeWidth, OuterShAmt) << MaskShift; local 458 if (IC.MaskedValueIsZero(InnerShift->getOperand(0), Mask, 0, CxtI)) 587 APInt Mask = IsInnerShl local 591 ConstantInt::get(ShType, Mask)); 782 Constant *Mask = ConstantInt::get(I.getContext(), Bits); local 784 Mask = ConstantVector::getSplat(VT->getNumElements(), Mask); 785 return BinaryOperator::CreateAnd(X, Mask); 817 Constant *Mask = ConstantInt::get(I.getContext(), Bits); local 819 Mask 1015 Value *Mask = Builder.CreateShl(AllOnes, Op1); local 1169 Value *Mask = Builder.CreateLShr(AllOnes, Op1); local [all...] |
H A D | InstCombineCalls.cpp | 894 APInt Mask = APInt::getLowBitsSet(64, Length).shl(Index); local 895 V00 = V00 & ~Mask; 1306 Value *Mask = II.getOperand(1); local 1311 if (isa<ConstantAggregateZero>(Mask)) 1314 auto *ConstMask = dyn_cast<ConstantDataVector>(Mask); 1342 Value *Mask = II.getOperand(1); local 1347 if (isa<ConstantAggregateZero>(Mask)) { 1357 auto *ConstMask = dyn_cast<ConstantDataVector>(Mask); 2500 uint64_t Mask = MaskC->getZExtValue(); local 2504 while (Mask) { 2529 uint64_t Mask = MaskC->getZExtValue(); local 2798 Value *Mask = II->getArgOperand(3); local 3141 Value *Mask = II->getArgOperand(2); local 3540 uint32_t Mask = CMask->getZExtValue(); local [all...] |
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/ |
H A D | Scheduler.h | 232 /// Only the most significant bit of the Mask is used by this method to 234 unsigned getResourceID(uint64_t Mask) const { 235 return Resources->resolveResourceMask(Mask);
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/freebsd-12-stable/contrib/llvm-project/llvm/tools/llvm-pdbutil/ |
H A D | FormatUtil.h | 33 #define PUSH_MASKED_FLAG(Enum, Mask, TheOpt, Value, Text) \ 34 if (Enum::TheOpt == (Value & Mask)) \
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | LivePhysRegs.cpp | 156 LaneBitmask Mask = LI.LaneMask; local 158 assert(Mask.any() && "Invalid livein mask"); 159 if (Mask.all() || !S.isValid()) { 165 if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any())
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/freebsd-12-stable/contrib/subversion/subversion/libsvn_subr/ |
H A D | win32_crashrpt_dll.h | 51 typedef BOOL (WINAPI * SYMENUMSYMBOLS)(HANDLE hProcess, ULONG64 BaseOfDll, PCSTR Mask,
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.h | 122 void adjustStackMapLiveOutMask(uint32_t *Mask) const override;
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Support/ |
H A D | LowLevelTypeImpl.h | 237 static uint64_t maskAndShift(uint64_t Val, uint64_t Mask, uint8_t Shift) { argument 238 assert(Val <= Mask && "Value too large for field"); 239 return (Val & Mask) << Shift;
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