/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUSubtarget.h | 394 SIInstrInfo InstrInfo; member in class:llvm::GCNSubtarget 410 return &InstrInfo; 422 return &InstrInfo.getRegisterInfo(); 1222 R600InstrInfo InstrInfo; member in class:llvm::final 1240 const R600InstrInfo *getInstrInfo() const override { return &InstrInfo; } 1251 return &InstrInfo.getRegisterInfo();
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H A D | AMDGPUSubtarget.cpp | 285 InstrInfo(initializeSubtargetDependencies(TT, GPU, FS)), 535 InstrInfo(*this), 566 return InstrInfo.pseudoToMCOpcode(AMDGPU::V_MAD_F16) != -1; 736 Lat = InstrInfo.getInstrLatency(getInstrItineraryData(), *I); 746 unsigned Lat = InstrInfo.getInstrLatency(getInstrItineraryData(), *SrcI); 930 Mutations.push_back(std::make_unique<MemOpClusterMutation>(&InstrInfo)); 931 Mutations.push_back(std::make_unique<FillMFMAShadowMutation>(&InstrInfo));
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H A D | SIWholeQuadMode.cpp | 126 struct InstrInfo { struct in namespace:__anon5034 156 DenseMap<const MachineInstr *, InstrInfo> Instructions; 252 InstrInfo &II = Instructions[&MI]; 330 InstrInfo &III = Instructions[&MI]; 431 InstrInfo II = Instructions[&MI]; // take a copy to prevent dangling references 455 InstrInfo &PrevII = Instructions[PrevMI]; 482 InstrInfo &LastII = Instructions[LastMI];
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonSubtarget.h | 87 HexagonInstrInfo InstrInfo; member in class:llvm::HexagonSubtarget 103 const HexagonInstrInfo *getInstrInfo() const override { return &InstrInfo; }
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H A D | HexagonSubtarget.cpp | 83 InstrInfo(initializeSubtargetDependencies(CPU, FS)), 357 int DLatency = (InstrInfo.getOperandLatency(&InstrItins, *SrcInst, 436 int Latency = (InstrInfo.getOperandLatency(&InstrItins, *SrcI,
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCSubtarget.h | 153 PPCInstrInfo InstrInfo; member in class:llvm::PPCSubtarget 189 const PPCInstrInfo *getInstrInfo() const override { return &InstrInfo; }
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H A D | PPCSubtarget.cpp | 60 InstrInfo(*this), TLInfo(TM, *this) {}
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H A D | PPCRegisterInfo.cpp | 349 const PPCInstrInfo *InstrInfo = Subtarget.getInstrInfo(); local 372 unsigned Opcode = InstrInfo->getStoreOpcodeForSpill(Reg); 386 if (InstrInfo->isXFormMemOp(Opcode))
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMSubtarget.h | 527 return InstrInfo.get(); 539 return &InstrInfo->getRegisterInfo(); 552 std::unique_ptr<ARMBaseInstrInfo> InstrInfo; member in class:llvm::ARMSubtarget
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H A D | ARMSubtarget.cpp | 106 InstrInfo(isThumb1Only()
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/freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/ |
H A D | InstrInfoEmitter.cpp | 75 Record *InstrInfo, 497 OS << TargetName << "InstrInfo::"; 528 Record *InstrInfo = Target.getInstructionSet(); local 566 emitRecord(*Inst, Num++, InstrInfo, EmittedLists, OperandInfoIDs, OS); 651 Record *InstrInfo, 650 emitRecord(const CodeGenInstruction &Inst, unsigned Num, Record *InstrInfo, std::map<std::vector<Record*>, unsigned> &EmittedLists, const OperandInfoMapTy &OpInfo, raw_ostream &OS) argument
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64Subtarget.h | 223 AArch64InstrInfo InstrInfo; member in class:llvm::final 259 const AArch64InstrInfo *getInstrInfo() const override { return &InstrInfo; }
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H A D | AArch64Subtarget.cpp | 185 InstrInfo(initializeSubtargetDependencies(FS, CPU)), TSInfo(),
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
H A D | LanaiMCCodeEmitter.cpp | 306 llvm::createLanaiMCCodeEmitter(const MCInstrInfo &InstrInfo, argument 309 return new LanaiMCCodeEmitter(InstrInfo, context);
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86Subtarget.h | 503 X86InstrInfo InstrInfo; member in class:llvm::final 520 const X86InstrInfo *getInstrInfo() const override { return &InstrInfo; }
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H A D | X86Subtarget.cpp | 336 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSubtarget.cpp | 86 InstrInfo(
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/ |
H A D | MIParser.cpp | 146 auto InstrInfo = Names2InstrOpCodes.find(InstrName); local 147 if (InstrInfo == Names2InstrOpCodes.end()) 149 OpCode = InstrInfo->getValue();
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/freebsd-12-stable/lib/clang/libllvm/ |
H A D | Makefile | 1712 InstrInfo/-gen-instr-info \
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/freebsd-12-stable/contrib/llvm-project/llvm/tools/llvm-objdump/ |
H A D | MachODump.cpp | 7198 std::unique_ptr<const MCInstrInfo> InstrInfo(TheTarget->createMCInstrInfo()); 7235 Triple(TripleName), AsmPrinterVariant, *AsmInfo, *InstrInfo, *MRI));
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