Searched refs:cpu (Results 176 - 200 of 796) sorted by relevance

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/freebsd-12-stable/sys/kern/
H A Dsubr_early.c37 #include <machine/cpu.h>
H A Dsched_4bsd.c96 fixpt_t ts_pctcpu; /* %cpu during p_swtime. */
97 u_int ts_estcpu; /* Estimated cpu utilization. */
98 int ts_cpticks; /* Ticks of cpu time. */
119 #define THREAD_CAN_SCHED(td, cpu) \
120 CPU_ISSET((cpu), &(td)->td_cpuset->cs_mask)
433 #define decay_cpu(loadfac, cpu) (((loadfac) * (cpu)) / ((loadfac) + FSCALE))
697 * process gets worse as it accumulates CPU time. The cpu usage
701 * cpu usage estimator ramps up quite quickly when the process is
1233 int best, cpu; local
1262 u_int cpu, cpuid; local
1494 sched_bind(struct thread *td, int cpu) argument
1711 int cpu; local
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H A Dsubr_epoch.c148 int cpu; local
160 CPU_FOREACH(cpu) {
161 GROUPTASK_INIT(DPCPU_ID_PTR(cpu, epoch_cb_task), 0,
164 DPCPU_ID_PTR(cpu, epoch_cb_task), NULL, cpu, -1,
187 int cpu; local
190 CPU_FOREACH(cpu) {
191 er = zpcpu_get_cpu(epoch->e_pcpu_record, cpu);
195 er->er_cpuid = cpu;
259 int cpu; local
742 int cpu; local
824 int cpu; local
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H A Dsubr_gtaskqueue.c606 taskqgroup_cpu_create(struct taskqgroup *qgroup, int idx, int cpu) argument
616 qcpu->tgc_cpu = cpu;
727 int qid, cpu, error; local
731 cpu = qgroup->tqg_queue[qid].tgc_cpu;
736 CPU_SET(cpu, &mask);
753 void *uniq, int cpu, int irq, const char *name)
762 gtask->gt_cpu = cpu;
766 if (qgroup->tqg_queue[i].tgc_cpu == cpu) {
772 printf("%s: qid not found for %s cpu=%d\n", __func__, gtask->gt_name, cpu);
752 taskqgroup_attach_cpu(struct taskqgroup *qgroup, struct grouptask *gtask, void *uniq, int cpu, int irq, const char *name) argument
798 int i, qid, irq, cpu, error; local
898 int i, k, old_cnt, old_cpu, cpu; local
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/freebsd-12-stable/sys/mips/include/
H A Dpmc_mdep.h74 uint32_t mips_get_perfctl(int cpu, int ri, uint32_t event, uint32_t caps);
/freebsd-12-stable/sys/sys/
H A Dcallout.h113 #define callout_reset_on(c, to_ticks, fn, arg, cpu) \
115 (cpu), C_HARDCLOCK)
120 #define callout_schedule_sbt_on(c, sbt, pr, cpu, flags) \
122 (cpu), (flags))
H A Dseq.h52 * depending on the cpu. Modern AMD cpus provide strong enough guarantees to not
95 #include <machine/cpu.h>
/freebsd-12-stable/sys/i386/ibcs2/
H A Dibcs2_isc.c43 #include <machine/cpu.h>
/freebsd-12-stable/sys/arm/arm/
H A Dpmu.c60 #include <machine/cpu.h>
77 /* We don't currently handle pmu events, other than on cpu 0 */
107 u_int cpu; local
109 cpu = PCPU_GET(cpuid);
113 atomic_add_32(&ccnt_hi[cpu], 1);
/freebsd-12-stable/sys/arm64/include/
H A Dpcpu.h33 #include <machine/cpu.h>
/freebsd-12-stable/gnu/usr.bin/gdb/kgdb/
H A Dkgdb.h44 int cpu; member in struct:kthr
/freebsd-12-stable/sys/powerpc/powerpc/
H A Dopenpic.c91 u_int cpu, ipi, irq; local
183 for (cpu = 0; cpu < sc->sc_ncpu; cpu++)
184 openpic_write(sc, OPENPIC_PCPU_TPR(cpu), 15);
209 /* send all interrupts to cpu 0 */
213 /* clear all pending interrupts from cpu 0 */
219 for (cpu = 0; cpu < sc->sc_ncpu; cpu
337 openpic_ipi(device_t dev, u_int cpu) argument
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H A Ddb_trace.c103 { "dsisr", DB_OFFSET(cpu.aim.dsisr), db_frame },
106 { "esr", DB_OFFSET(cpu.booke.esr), db_frame },
220 (tf->cpu.booke.esr & ESR_ST) ? "write"
224 (tf->cpu.aim.dsisr & DSISR_STORE) ? "write"
230 tf->dar, (uint32_t)tf->cpu.aim.dsisr);
278 (uint32_t)tf->cpu.aim.dsisr);
H A Dintr_machdep.c104 cpuset_t cpu; member in struct:powerpc_intr
161 PIC_BIND(i->pic, i->intline, i->cpu);
220 i->cpu = all_cpus;
222 CPU_SETOF(0, &i->cpu);
305 powerpc_assign_intr_cpu(void *arg, int cpu) argument
310 if (cpu == NOCPU)
311 i->cpu = all_cpus;
313 CPU_SETOF(cpu, &i->cpu);
316 PIC_BIND(i->pic, i->intline, i->cpu);
533 powerpc_bind_intr(u_int irq, u_char cpu) argument
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/freebsd-12-stable/sys/i386/i386/
H A Dmp_machdep.c77 #include <machine/cpu.h>
236 /* Get per-cpu data */
320 int apic_id, cpu; local
339 for (cpu = 1; cpu < mp_ncpus; cpu++) {
340 apic_id = cpu_apic_ids[cpu];
343 bootstacks[cpu] = (char *)kmem_malloc(kstack_pages * PAGE_SIZE,
352 bootSTK = (char *)bootstacks[cpu] + kstack_pages *
354 bootAP = cpu;
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H A Dlocore.s361 movl $CPU_386,cpu
366 movl $CPU_NX586,cpu
389 movl $CPU_486,cpu
442 movl $CPU_486,cpu
448 movl $CPU_586,cpu
452 movl $CPU_686,cpu
H A Dinitcpu.c649 switch (cpu) {
977 if ((cpu != CPU_M1SC) && (cpu != CPU_CY486DX)) {
983 if ((cpu == CPU_M1SC) || (cpu == CPU_M1) || (cpu == CPU_M2)) {
986 if ((cpu == CPU_M1) || (cpu == CPU_M2))
994 if ((cpu != CPU_M1SC) && (cpu !
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/freebsd-12-stable/sys/arm/amlogic/aml8726/
H A Daml8726_mp.c56 #include <machine/cpu.h>
226 power_on_cpu(int cpu) argument
231 if (cpu <= 0)
247 scpsr &= ~(AML_SCU_CPU_PWR_STATUS_CPU1_MASK << ((cpu - 1) * 8));
260 ((cpu - 1) * 2));
271 value |= AML_M8_CPU_CLK_CNTL_RESET_CPU1 << (cpu - 1);
281 ((cpu - 1) * 4));
291 ((cpu - 1) * 2));
304 (cpu - 1);
315 value &= ~(AML_M8_CPU_PWR_CNTL0_ISO_CPU1 << (cpu
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/freebsd-12-stable/contrib/bearssl/T0/
H A DTValue.cs117 internal void Execute(T0Comp ctx, CPU cpu) argument
119 ToXT().Execute(ctx, cpu);
/freebsd-12-stable/sys/xen/
H A Dxen_intr.h124 * \param cpu The cpu on which interrupt events should be delivered.
137 int xen_intr_bind_virq(device_t dev, u_int virq, u_int cpu,
146 * \param cpu The cpu receiving the IPI.
154 int xen_intr_alloc_and_bind_ipi(u_int cpu,
/freebsd-12-stable/gnu/usr.bin/binutils/libbfd/
H A DMakefile.mips18 cpu-mips.c \
/freebsd-12-stable/usr.sbin/pmcstat/
H A Dpmcpl_annotate.c82 uint32_t nsamples, uintfptr_t *cc, int usermode, uint32_t cpu)
89 (void) pmcr; (void) nsamples; (void) usermode; (void) cpu;
81 pmcpl_annotate_process(struct pmcstat_process *pp, struct pmcstat_pmcrecord *pmcr, uint32_t nsamples, uintfptr_t *cc, int usermode, uint32_t cpu) argument
/freebsd-12-stable/cddl/lib/libdtrace/
H A Dsched.d69 inline processorid_t cpu = curcpu->cpu_id;
70 #pragma D attributes Stable/Stable/Common cpu
71 #pragma D binding "1.0" cpu
/freebsd-12-stable/sys/sparc64/sparc64/
H A Dintr_machdep.c122 static int intr_assign_cpu(void *arg, int cpu);
263 intr_assign_cpu(void *arg, int cpu) argument
273 if (assign_cpu && cpu != NOCPU) {
274 pc = pcpu_find(cpu);
503 intr_bind(int vec, u_char cpu) argument
516 error = intr_event_bind(iv->iv_event, cpu);
526 intr_add_cpu(u_int cpu) argument
529 if (cpu >= MAXCPU)
532 printf("INTR: Adding CPU %d as a target\n", cpu);
534 CPU_SET(cpu,
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/freebsd-12-stable/sys/x86/xen/
H A Dxen_intr.c79 * Per-cpu event channel processing state.
216 evtchn_cpu_mask_port(u_int cpu, evtchn_port_t port) argument
220 pcpu = DPCPU_ID_PTR(cpu, xen_intr_pcpu);
238 evtchn_cpu_unmask_port(u_int cpu, evtchn_port_t port) argument
242 pcpu = DPCPU_ID_PTR(cpu, xen_intr_pcpu);
247 * Allocate and register a per-cpu Xen upcall interrupt counter.
249 * \param cpu The cpu for which to register this interrupt count.
252 xen_intr_intrcnt_add(u_int cpu) argument
257 pcpu = DPCPU_ID_PTR(cpu, xen_intr_pcp
523 u_int l1i, l2i, port, cpu; local
712 int cpu = isrc->xi_cpu; local
741 int cpu = isrc->xi_cpu; local
1296 xen_intr_bind_virq(device_t dev, u_int virq, u_int cpu, driver_filter_t filter, driver_intr_t handler, void *arg, enum intr_type flags, xen_intr_handle_t *port_handlep) argument
1356 xen_intr_alloc_and_bind_ipi(u_int cpu, driver_filter_t filter, enum intr_type flags, xen_intr_handle_t *port_handlep) argument
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