Searched refs:insn (Results 76 - 100 of 232) sorted by relevance

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/freebsd-11.0-release/contrib/binutils/opcodes/
H A Dcgen-asm.c44 /* Called whenever starting to parse an insn. */
79 const CGEN_INSN *insn = &insns[i]; local
81 if (! (* cd->asm_hash_p) (insn))
83 hash = (* cd->asm_hash) (CGEN_INSN_MNEMONIC (insn));
85 hentbuf->insn = insn;
108 if (! (* cd->asm_hash_p) (ilist->insn))
110 hash = (* cd->asm_hash) (CGEN_INSN_MNEMONIC (ilist->insn));
112 hentbuf->insn = ilist->insn;
177 cgen_asm_lookup_insn(CGEN_CPU_DESC cd, const char *insn) argument
[all...]
/freebsd-11.0-release/contrib/binutils/gas/config/
H A Dtc-alpha.c82 unsigned insn;
339 /* Symbol labelling the current insn. When the Alpha gas sees
858 /* Only support one relocation op per insn. */
859 as_bad (_("More than one relocation op per insn"));
1105 the insn, but do not emit it.
1108 than one insn in an insn structure. */
1114 struct alpha_insn *insn)
1126 assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED);
1191 struct alpha_insn insn;
81 unsigned insn; member in struct:alpha_insn
1104 assemble_tokens_to_insn(const char *opname, const expressionS *tok, int ntok, struct alpha_insn *insn) argument
1184 struct alpha_insn insn; local
1589 emit_insn(struct alpha_insn *insn) argument
1801 insert_operand(unsigned insn, const struct alpha_operand *operand, offsetT val, char *file, unsigned line) argument
1844 assemble_insn(const struct alpha_opcode *opcode, const expressionS *tok, int ntok, struct alpha_insn *insn, bfd_reloc_code_real_type reloc) argument
2001 struct alpha_insn insn; local
2039 struct alpha_insn insn; local
2088 struct alpha_insn insn; local
2240 struct alpha_insn insn; local
2643 struct alpha_insn insn; local
2741 struct alpha_insn insn; local
3124 struct alpha_insn insn; local
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H A Dtc-cr16.c1390 parse_insn (ins *insn, char *operands) argument
1399 insn->nargs = 0;
1407 insn->nargs = 1;
1408 insn->arg[0].type = arg_ic;
1409 insn->arg[0].constant = gettrap (operands);
1410 insn->arg[0].X_op = O_constant;
1415 parse_operands (insn, operands);
1994 warn_if_needed (ins *insn) argument
2002 if ((insn->arg[0].type == arg_r) || (insn
2104 assemble_insn(char *mnemonic, ins *insn) argument
2310 print_insn(ins *insn) argument
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H A Dtc-spu.c51 static const char *get_imm (const char *param, struct spu_insn *insn, int arg);
52 static const char *get_reg (const char *param, struct spu_insn *insn, int arg,
55 struct spu_insn *insn);
152 * register names and the orx insn */
269 struct spu_insn insn;
300 /* try parsing this instruction into insn */
303 insn.exp[i].X_add_symbol = 0;
304 insn.exp[i].X_op_symbol = 0;
305 insn.exp[i].X_add_number = 0;
306 insn
267 struct spu_insn insn; local
379 calcop(struct spu_opcode *format, const char *param, struct spu_insn *insn) argument
484 get_reg(const char *param, struct spu_insn *insn, int arg, int accept_expr) argument
585 get_imm(const char *param, struct spu_insn *insn, int arg) argument
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H A Dtc-sparc.c388 * v9 insn must be seen.
850 const struct sparc_opcode *insn;
854 insn = (struct sparc_opcode *) hash_find (op_hash, name);
855 if (insn == NULL)
863 retval = hash_insert (op_hash, native_op_table[i].name, (PTR) insn);
1040 synthetize_setuw (insn)
1041 const struct sparc_opcode *insn;
1076 output_insn (insn, &the_insn);
1092 output_insn (insn, &the_insn);
1099 synthetize_setsw (insn)
845 const struct sparc_opcode *insn; local
1313 const struct sparc_opcode *insn; local
1400 const struct sparc_opcode *insn; local
3059 long insn; local
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/freebsd-11.0-release/contrib/gcc/
H A Dcaller-save.c28 #include "insn-config.h"
65 saved in its widest mode with a simple SET insn as long as the memory
75 /* Set of hard regs currently residing in save area (during insn scan). */
84 insn. */
105 simple insn to save and restore the register. This latter check avoids
147 the validity of an insn operand is dependent on the address offset.
182 /* Next we try to form an insn to save and restore the register. We
183 see if such an insn is recognized and meets its constraints.
382 rtx insn = chain->insn;
379 rtx insn = chain->insn; local
782 rtx insn = chain->insn; local
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H A Drecog.c29 #include "insn-config.h"
30 #include "insn-attr.h"
99 before any insn recognition may be done in the function. */
115 /* Check that X is an insn-body for an `asm' with operands
129 /* ??? Doh! We've not got the wrapping insn. Cook one up. */
183 an INSN, CALL_INSN, or JUMP_INSN, the insn will be re-recognized with
190 If IN_GROUP is zero, this is a single change. Try to recognize the insn
226 /* Set INSN_CODE to force rerecognition of insn. Save old code in
248 insn_invalid_p (rtx insn)
250 rtx pat = PATTERN (insn);
246 insn_invalid_p(rtx insn) argument
657 validate_replace_rtx(rtx from, rtx to, rtx insn) argument
659 validate_replace_rtx_1 (&PATTERN (insn), from, to, insn); local
666 validate_replace_rtx_group(rtx from, rtx to, rtx insn) argument
668 validate_replace_rtx_1 (&PATTERN (insn), from, to, insn); local
676 rtx insn; /* Insn in which substitution is occurring. */ member in struct:validate_replace_src_data
692 validate_replace_src_group(rtx from, rtx to, rtx insn) argument
707 validate_simplify_insn(rtx insn) argument
748 next_insn_tests_no_inequality(rtx insn) argument
878 find_single_use(rtx dest, rtx insn, rtx *ploc) argument
1978 extract_insn_cached(rtx insn) argument
1989 extract_constrain_insn_cached(rtx insn) argument
2010 extract_insn(rtx insn) argument
2696 split_insn(rtx insn) argument
2740 rtx insn, next; local
2822 rtx next, insn; local
2855 rtx insn; member in struct:peep2_insn_data
3036 rtx insn, prev; local
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H A Dfunction.c53 #include "insn-config.h"
1342 matches the predicate for insn CODE operand OPERAND. */
1360 registers present inside of insn. The result will be a valid insn. */
1363 instantiate_virtual_regs_in_insn (rtx insn)
1371 set = single_set (insn);
1393 emit_insn_before (seq, insn);
1394 delete_insn (insn);
1399 new add insn. The difference between this and falling through
1401 move insn i
1352 instantiate_virtual_regs_in_insn(rtx insn) argument
1683 rtx insn; local
3620 rtx insn; local
3987 rtx insn = gen_stack_protect_set (x, y); local
4327 rtx insn, seq; local
4628 set_insn_locators(rtx insn, int loc) argument
4642 contains(rtx insn, VEC(int,heap) **vec) argument
4667 prologue_epilogue_contains(rtx insn) argument
4677 sibcall_epilogue_contains(rtx insn) argument
4754 rtx insn, next; local
5464 rtx insn = BB_END (bb); local
5493 rtx insn, prev; local
5547 rtx insn, next; local
5574 rtx insn, last, note; local
5698 check_block_change(rtx insn, tree *block) argument
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H A Ddf-scan.c37 #include "insn-config.h"
544 df_ref_create (struct df *df, rtx reg, rtx *loc, rtx insn,
571 return df_ref_create_structure (dflow, reg, loc, bb, insn, ref_type, ref_flags);
757 /* Create the insn record for INSN. If there was one there, zero it out. */ argument
760 df_insn_create_insn_record (struct dataflow *dflow, rtx insn)
766 struct df_insn_info *insn_rec = DF_INSN_GET (df, insn);
770 DF_INSN_SET (df, insn, insn_rec);
781 df_insn_refs_delete (struct dataflow *dflow, rtx insn)
784 unsigned int uid = INSN_UID (insn);
821 DF_INSN_SET (df, insn, NUL
542 df_ref_create(struct df *df, rtx reg, rtx *loc, rtx insn, basic_block bb, enum df_ref_type ref_type, enum df_ref_flags ref_flags) argument
778 df_insn_refs_delete(struct dataflow *dflow, rtx insn) argument
833 rtx insn; local
931 df_ref_create_structure(struct dataflow *dflow, rtx reg, rtx *loc, basic_block bb, rtx insn, enum df_ref_type ref_type, enum df_ref_flags ref_flags) argument
1046 df_ref_record(struct dataflow *dflow, rtx reg, rtx *loc, basic_block bb, rtx insn, enum df_ref_type ref_type, enum df_ref_flags ref_flags, bool record_live) argument
1180 df_def_record_1(struct dataflow *dflow, rtx x, basic_block bb, rtx insn, enum df_ref_flags flags, bool record_live) argument
1254 df_defs_record(struct dataflow *dflow, rtx x, basic_block bb, rtx insn) argument
1282 df_uses_record(struct dataflow *dflow, rtx *loc, enum df_ref_type ref_type, basic_block bb, rtx insn, enum df_ref_flags flags) argument
1503 df_insn_contains_asm(rtx insn) argument
1513 df_insn_refs_record(struct dataflow *dflow, basic_block bb, rtx insn) argument
1625 rtx insn; local
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H A Dloop-unroll.c76 rtx insn; /* The insn in that the induction variable occurs. */ member in struct:iv_to_split
82 variable occurs in the insn. For example if
91 rtx insn; /* The insn in that the variable expansion occurs. */ member in struct:var_to_expand
217 rtx insn; local
223 FOR_BB_INSNS (loop->latch, insn)
225 if (INSN_P (insn))
1469 return (hashval_t) INSN_UID (((struct iv_to_split *) ivts)->insn);
1480 return i1->insn
1511 rtx insn; local
1551 analyze_insn_to_expand_var(struct loop *loop, rtx insn) argument
1644 analyze_iv_to_split_insn(rtx insn) argument
1703 rtx insn; local
1845 insert_base_initialization(struct iv_to_split *ivts, rtx insn) argument
1864 split_iv(struct iv_to_split *ivts, rtx insn, unsigned delta) argument
1946 expand_var_during_unrolling(struct var_to_expand *ve, rtx insn) argument
1985 rtx seq, var, zero_init, insn; local
2028 rtx expr, seq, var, insn; local
2080 rtx insn, orig_insn, next; local
[all...]
H A Dgenemit.c51 /* Records one insn that uses the clobber list. */
110 max_operand_vec (rtx insn, int arg)
112 int len = XVECLEN (insn, arg);
120 max_operand_1 (XVECEXP (insn, arg, i));
320 gen_insn (rtx insn, int lineno)
325 /* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
329 if (XVEC (insn, 1))
333 for (i = XVECLEN (insn, 1) - 1; i > 0; i--)
335 if (GET_CODE (XVECEXP (insn, 1, i)) != CLOBBER)
338 if (REG_P (XEXP (XVECEXP (insn,
109 max_operand_vec(rtx insn, int arg) argument
317 gen_insn(rtx insn, int lineno) argument
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H A Dtoplev.h39 #define fatal_insn(msgid, insn) \
40 _fatal_insn (msgid, insn, __FILE__, __LINE__, __FUNCTION__)
41 #define fatal_insn_not_found(insn) \
42 _fatal_insn_not_found (insn, __FILE__, __LINE__, __FUNCTION__)
H A Difcvt.c31 #include "insn-config.h"
122 rtx insn = BB_HEAD (bb);
126 if (CALL_P (insn) || NONJUMP_INSN_P (insn))
129 if (insn == BB_END (bb))
131 insn = NEXT_INSN (insn);
145 rtx insn = BB_HEAD (bb);
149 if (NONJUMP_INSN_P (insn))
151 int cost = insn_rtx_cost (PATTERN (insn));
121 rtx insn = BB_HEAD (bb); local
144 rtx insn = BB_HEAD (bb); local
189 rtx insn = BB_HEAD (bb); local
216 rtx insn = BB_END (bb); local
264 rtx insn; local
694 rtx seq, insn, target; local
796 rtx insn; local
1481 rtx cond, set, insn; local
1765 rtx set, insn = prev_nonnote_insn (earliest); local
2413 rtx insn; local
2480 rtx jump, cond, insn, seq, cond_arg0, cond_arg1, loc_insn; local
2879 rtx insn; local
3647 rtx insn, cond, prev; local
3797 rtx insn; local
[all...]
H A Dgenconfig.c35 static int max_dup_operands; /* Largest number of match_dup in any insn. */
61 be used to recognize, rather than just generate an insn.
172 gen_insn (rtx insn) argument
176 /* Walk the insn pattern to gather the #define's status. */
179 if (XVEC (insn, 1) != 0)
180 for (i = 0; i < XVECLEN (insn, 1); i++)
181 walk_insn_part (XVECEXP (insn, 1, i), 1, 0);
192 gen_expand (rtx insn) argument
196 /* Walk the insn pattern to gather the #define's status. */
200 if (XVEC (insn,
[all...]
H A Dpredict.c41 #include "insn-config.h"
221 predict_insn (rtx insn, enum br_predictor predictor, int probability) argument
223 gcc_assert (any_condjump_p (insn));
227 REG_NOTES (insn)
232 REG_NOTES (insn));
235 /* Predict insn by given predictor. */
238 predict_insn_def (rtx insn, enum br_predictor predictor, argument
246 predict_insn (insn, predictor, probability);
305 /* Return true when we can store prediction on insn INSN.
309 can_predict_insn_p (rtx insn) argument
334 invert_br_probabilities(rtx insn) argument
404 combine_predictions_for_insn(rtx insn, basic_block bb) argument
1386 rtx insn, cond, ev = NULL_RTX, ev_reg = NULL_RTX; local
1764 rtx insn; local
[all...]
/freebsd-11.0-release/contrib/gdb/gdb/
H A Ds390-tdep.c951 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2) argument
953 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
955 *r1 = (insn[1] >> 4) & 0xf;
957 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
966 is_ril (bfd_byte *insn, int op1, int op2, argument
969 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
971 *r1 = (insn[
987 is_rr(bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) argument
1001 is_rre(bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) argument
1016 is_rs(bfd_byte *insn, int op, unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2) argument
1033 is_rsy(bfd_byte *insn, int op1, int op2, unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2) argument
1053 is_rx(bfd_byte *insn, int op, unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2) argument
1070 is_rxy(bfd_byte *insn, int op1, int op2, unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2) argument
1333 bfd_byte insn[S390_MAX_INSTR_SIZE]; local
1722 bfd_byte insn[6]; local
2109 bfd_byte insn[S390_MAX_INSTR_SIZE]; local
[all...]
H A Dsparc-tdep.c96 unsigned long insn; local
103 insn = 0;
105 insn = (insn << 8) | buf[i];
106 return insn;
530 unsigned long insn;
550 insn = sparc_fetch_instruction (pc);
552 /* Recognize a SETHI insn and record its destination. */
553 if (X_OP (insn) == 0 && X_OP2 (insn)
524 unsigned long insn; local
953 unsigned long insn = sparc_fetch_instruction (pc); local
[all...]
H A Dppcfbsd-tdep.c263 unsigned int mask; /* mask the insn with this... */
265 int optional; /* If non-zero, this insn may be absent. */
283 unsigned int *insn)
289 insn[i] = read_insn (pc);
290 if ((insn[i] & pattern[i].mask) == pattern[i].data)
293 insn[i] = 0;
305 insn_d_field (unsigned int insn) argument
307 return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000);
315 insn_ds_field (unsigned int insn) argument
317 return ((((CORE_ADDR) insn
281 insns_match_pattern(CORE_ADDR pc, struct insn_pattern *pattern, unsigned int *insn) argument
416 ppc64_standard_linkage_target(CORE_ADDR pc, unsigned int *insn) argument
[all...]
/freebsd-11.0-release/sys/sparc64/sparc64/
H A Ddb_disasm.c54 * operation is encoded into a particular 32-bit insn. There are 3
56 * bits 30-31 of the insn. Here are the bit fields and their names:
139 s -- %asi is implicit in the insn, rs1 value not used
146 9 -- logical or of the cmask and mmask fields (membar insn)
809 unsigned int insn, you_lose, bitmask; local
815 insn = db_get_value(loc, 4, 0);
817 if (insn == 0x01000000) {
865 if (((bitmask & insn) == bitmask) && ((you_lose & insn) == 0)) {
886 if (insn
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/freebsd-11.0-release/contrib/binutils/gas/
H A Ditbl-parse.y126 entrydef -> 'insn' name val funcdef ; type of entry (instruction)
276 static struct itbl_entry *insn=0;
319 insn=itbl_add_insn ($1, $3, $4, sbit, ebit, $6);
356 itbl_add_operand (insn, $1, sbit, ebit, $3);
H A Dcgen.c246 operands residing in the insn, but instead just use the
251 gas_cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offset)
254 const CGEN_INSN * insn;
263 /* It may seem strange to use operand->attrs and not insn->attrs here,
270 fixP->fx_cgen.insn = insn;
287 operands residing in the insn, but instead just use the
292 gas_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp)
295 const CGEN_INSN * insn;
303 /* It may seem strange to use operand->attrs and not insn
893 const CGEN_INSN *insn = fixP->fx_cgen.insn; local
[all...]
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp98 uint32_t insn,
101 static DecodeStatus DecodeMoveImmInstruction(llvm::MCInst &Inst, uint32_t insn,
105 uint32_t insn,
109 uint32_t insn, uint64_t Address,
112 uint32_t insn,
115 static DecodeStatus DecodePairLdStInstruction(llvm::MCInst &Inst, uint32_t insn,
119 uint32_t insn, uint64_t Address,
122 uint32_t insn, uint64_t Address,
124 static DecodeStatus DecodeModImmInstruction(llvm::MCInst &Inst, uint32_t insn,
128 uint32_t insn, uint64_
740 DecodeThreeAddrSRegInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
802 DecodeMoveImmInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
835 DecodeUnsignedLdStInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
896 DecodeSignedLdStInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1081 DecodeExclusiveLdStInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1164 DecodePairLdStInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1293 DecodeAddSubERegInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1350 DecodeLogicalImmInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1381 DecodeModImmInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1420 DecodeModImmTiedInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1438 DecodeAdrInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1457 DecodeBaseAddSubImm(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1493 DecodeUnconditionalBranch(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1510 DecodeSystemPStateInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
1535 DecodeTestAndBranch(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) argument
[all...]
/freebsd-11.0-release/gnu/usr.bin/cc/cc_tools/
H A DMakefile56 $(srcdir)/real.h $(srcdir)/varray.h $(srcdir)/insn-addr.h $(srcdir)/hwint.h \
300 gen$F: gen$F.o rtl.o read-rtl.o ggc-none.o vec.o min-insn-modes.o \
311 insn-conditions.md: gencondmd
313 GENSRCS+= insn-conditions.md
320 insn-$F.h: gen$F ${MD_FILE}
322 GENSRCS+= insn-$F.h
326 insn-$F.h: gen$F ${MD_FILE} insn-conditions.md
327 ${BTOOLSPATH:U.}/gen$F ${MD_FILE} insn-conditions.md > ${.TARGET}
328 GENSRCS+= insn
[all...]
/freebsd-11.0-release/contrib/wpa/src/drivers/
H A Ddriver_nl80211_monitor.c287 struct sock_filter *insn = &msock_filter_insns[idx]; local
289 if (BPF_CLASS(insn->code) == BPF_JMP) {
290 if (insn->code == (BPF_JMP|BPF_JA)) {
291 if (insn->k == PASS)
292 insn->k = msock_filter.len - idx - 2;
293 else if (insn->k == FAIL)
294 insn->k = msock_filter.len - idx - 3;
297 if (insn->jt == PASS)
298 insn->jt = msock_filter.len - idx - 2;
299 else if (insn
[all...]
/freebsd-11.0-release/contrib/binutils/include/opcode/
H A Dmips.h438 /* Conditional branch likely: if branch not taken, insn nullified. */
593 #define OPCODE_IS_MEMBER(insn, isa, cpu) \
594 (((insn)->membership & isa) != 0 \
595 || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0) \
596 || (cpu == CPU_RM7000 && ((insn)->membership & INSN_4650) != 0) \
597 || (cpu == CPU_RM9000 && ((insn)->membership & INSN_4650) != 0) \
598 || (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0) \
599 || (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0) \
600 || (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0) \
602 && ((insn)
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