Searched refs:TM (Results 26 - 50 of 282) sorted by relevance

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/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64TargetObjectFile.cpp22 const TargetMachine &TM) {
23 TargetLoweringObjectFileELF::Initialize(Ctx, TM);
24 InitializeELF(TM.Options.UseInitArray);
34 const TargetMachine &TM, MachineModuleInfo *MMI,
41 const MCSymbol *Sym = TM.getSymbol(GV, Mang);
51 GV, Encoding, Mang, TM, MMI, Streamer);
55 const GlobalValue *GV, Mangler &Mang, const TargetMachine &TM,
57 return TM.getSymbol(GV, Mang);
21 Initialize(MCContext &Ctx, const TargetMachine &TM) argument
32 getTTypeGlobalReference( const GlobalValue *GV, unsigned Encoding, Mangler &Mang, const TargetMachine &TM, MachineModuleInfo *MMI, MCStreamer &Streamer) const argument
54 getCFIPersonalitySymbol( const GlobalValue *GV, Mangler &Mang, const TargetMachine &TM, MachineModuleInfo *MMI) const argument
H A DAArch64TargetObjectFile.h21 void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
31 const TargetMachine &TM,
36 const TargetMachine &TM,
H A DAArch64TargetMachine.cpp155 // creation will depend on the TM and the code generation flags on the
184 AArch64PassConfig(AArch64TargetMachine *TM, PassManagerBase &PM) argument
185 : TargetPassConfig(TM, PM) {
186 if (TM->getOptLevel() != CodeGenOpt::None)
218 addPass(createAtomicExpandPass(TM));
223 if (TM->getOptLevel() != CodeGenOpt::None && EnableAtomicTidy)
229 if (TM->getOptLevel() != CodeGenOpt::None)
230 addPass(createInterleavedAccessPass(TM));
232 if (TM->getOptLevel() == CodeGenOpt::Aggressive && EnableGEPOpt) {
236 addPass(createSeparateConstOffsetFromGEPPass(TM, tru
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H A DAArch64Subtarget.cpp52 const TargetMachine &TM, bool LittleEndian)
60 TLInfo(TM, *this) {}
66 const TargetMachine &TM) const {
71 if (TM.getCodeModel() == CodeModel::Large && isTargetMachO())
76 if (TM.getCodeModel() == CodeModel::Small && GV->hasExternalWeakLinkage()) {
78 if (TM.getRelocationModel() == Reloc::Static)
92 if (TM.getRelocationModel() != Reloc::Static && GV->hasDefaultVisibility()) {
50 AArch64Subtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM, bool LittleEndian) argument
/freebsd-11.0-release/contrib/llvm/lib/Target/MSP430/
H A DMSP430Subtarget.cpp35 const std::string &FS, const TargetMachine &TM)
37 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this) {}
34 MSP430Subtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM) argument
H A DMSP430.h40 FunctionPass *createMSP430ISelDag(MSP430TargetMachine &TM,
H A DMSP430TargetMachine.cpp47 MSP430PassConfig(MSP430TargetMachine *TM, PassManagerBase &PM) argument
48 : TargetPassConfig(TM, PM) {}
/freebsd-11.0-release/contrib/llvm/include/llvm/CodeGen/
H A DStackProtector.h51 const TargetMachine *TM; member in class:llvm::StackProtector
109 : FunctionPass(ID), TM(nullptr), TLI(nullptr), SSPBufferSize(0) {
112 StackProtector(const TargetMachine *TM) argument
113 : FunctionPass(ID), TM(TM), TLI(nullptr), Trip(TM->getTargetTriple()),
/freebsd-11.0-release/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXLowerKernelArgs.cpp114 NVPTXLowerKernelArgs(const NVPTXTargetMachine *TM = nullptr)
115 : FunctionPass(ID), TM(TM) {}
121 const NVPTXTargetMachine *TM; member in class:__anon2953::NVPTXLowerKernelArgs
200 if (TM && TM->getDrvInterface() == NVPTX::CUDA) {
224 else if (TM && TM->getDrvInterface() == NVPTX::CUDA)
232 llvm::createNVPTXLowerKernelArgsPass(const NVPTXTargetMachine *TM) { argument
233 return new NVPTXLowerKernelArgs(TM);
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/freebsd-11.0-release/contrib/llvm/lib/Target/
H A DTargetLoweringObjectFile.cpp44 const TargetMachine &TM) {
46 InitMCObjectFileInfo(TM.getTargetTriple(), TM.getRelocationModel(),
47 TM.getCodeModel(), *Ctx);
105 const TargetMachine &TM) const {
110 TM.getNameWithPrefix(NameStr, GV, Mang);
116 const GlobalValue *GV, Mangler &Mang, const TargetMachine &TM,
118 return TM.getSymbol(GV, Mang);
128 /// a global variable. Given an global variable and information from TM, it
133 const TargetMachine &TM){
43 Initialize(MCContext &ctx, const TargetMachine &TM) argument
115 getCFIPersonalitySymbol( const GlobalValue *GV, Mangler &Mang, const TargetMachine &TM, MachineModuleInfo *MMI) const argument
132 getKindForGlobal(const GlobalValue *GV, const TargetMachine &TM) argument
290 getTTypeGlobalReference( const GlobalValue *GV, unsigned Encoding, Mangler &Mang, const TargetMachine &TM, MachineModuleInfo *MMI, MCStreamer &Streamer) const argument
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/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetObjectFile.h28 const TargetMachine &TM) const override;
42 void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
46 const TargetMachine &TM) const override;
H A DAMDGPUTargetMachine.cpp132 AMDGPUPassConfig(TargetMachine *TM, PassManagerBase &PM) argument
133 : TargetPassConfig(TM, PM) {
164 R600PassConfig(TargetMachine *TM, PassManagerBase &PM) argument
165 : AMDGPUPassConfig(TM, PM) { }
175 GCNPassConfig(TargetMachine *TM, PassManagerBase &PM) argument
176 : AMDGPUPassConfig(TM, PM) { }
252 addPass(createR600VectorRegMerger(*TM));
260 addPass(createR600ClauseMergePass(*TM), false);
265 addPass(createR600ExpandSpecialInstrsPass(*TM), false);
267 addPass(createR600Packetizer(*TM), fals
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/freebsd-11.0-release/contrib/llvm/lib/Target/XCore/
H A DXCoreTargetTransformInfo.h40 explicit XCoreTTIImpl(const XCoreTargetMachine *TM, const Function &F) argument
41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl()),
H A DXCore.h31 FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM,
/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/
H A DMips16ISelDAGToDAG.h23 explicit Mips16DAGToDAGISel(MipsTargetMachine &TM) : MipsDAGToDAGISel(TM) {} argument
49 FunctionPass *createMips16ISelDag(MipsTargetMachine &TM);
H A DMipsSubtarget.cpp64 const MipsTargetMachine &TM)
73 Os16(Mips_Os16), HasMSA(false), UseTCCInDIV(false), HasEVA(false), TM(TM),
76 MipsInstrInfo::create(initializeSubtargetDependencies(CPU, FS, TM))),
78 TLInfo(MipsTargetLowering::create(TM, *this)) {
117 if (NoABICalls && TM.getRelocationModel() == Reloc::PIC_)
144 const TargetMachine &TM) {
145 std::string CPUName = MIPS_MC::selectMipsCPU(TM.getTargetTriple(), CPU);
164 return TM.getRelocationModel();
171 const MipsABIInfo &MipsSubtarget::getABI() const { return TM
62 MipsSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, bool little, const MipsTargetMachine &TM) argument
143 initializeSubtargetDependencies(StringRef CPU, StringRef FS, const TargetMachine &TM) argument
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/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/
H A DARMTargetObjectFile.h29 void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
33 Mangler &Mang, const TargetMachine &TM,
H A DARMSubtarget.cpp90 const ARMBaseTargetMachine &TM, bool IsLittle)
93 IsLittle(IsLittle), TargetTriple(TT), Options(TM.Options), TM(TM),
102 TLInfo(TM, *this) {}
162 assert((!TM.getMCAsmInfo() ||
163 (TM.getMCAsmInfo()->getExceptionHandlingType() ==
258 assert(TM.TargetABI != ARMBaseTargetMachine::ARM_ABI_UNKNOWN);
259 return TM.TargetABI == ARMBaseTargetMachine::ARM_ABI_APCS;
262 assert(TM
88 ARMSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const ARMBaseTargetMachine &TM, bool IsLittle) argument
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/freebsd-11.0-release/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblySubtarget.cpp42 const TargetMachine &TM)
46 TLInfo(TM, *this) {}
39 WebAssemblySubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM) argument
/freebsd-11.0-release/contrib/llvm/lib/Target/X86/
H A DX86TargetObjectFile.h24 Mangler &Mang, const TargetMachine &TM,
31 const TargetMachine &TM,
50 void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
57 const TargetMachine &TM) const override;
/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagon.h53 ImmutablePass *createHexagonTargetTransformInfoPass(const HexagonTargetMachine *TM);
/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/
H A DSparcTargetObjectFile.h28 Mangler &Mang, const TargetMachine &TM,
/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCSubtarget.cpp51 const std::string &FS, const PPCTargetMachine &TM)
55 TM(TM), FrameLowering(initializeSubtargetDependencies(CPU, FS)),
56 InstrInfo(*this), TLInfo(TM, *this) {}
150 if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static)
222 if (TM.getCodeModel() == CodeModel::Large)
230 if (TM.getRelocationModel() == Reloc::PIC_) {
244 bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); }
245 bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); }
50 PPCSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const PPCTargetMachine &TM) argument
/freebsd-11.0-release/contrib/llvm/lib/CodeGen/
H A DInterleavedAccessPass.cpp69 InterleavedAccess(const TargetMachine *TM = nullptr)
70 : FunctionPass(ID), TM(TM), TLI(nullptr) {
79 const TargetMachine *TM; member in class:__anon2466::InterleavedAccess
97 FunctionPass *llvm::createInterleavedAccessPass(const TargetMachine *TM) { argument
98 return new InterleavedAccess(TM);
262 if (!TM || !LowerInterleavedAccesses)
267 TLI = TM->getSubtargetImpl(F)->getTargetLowering();
H A DMachineFunctionAnalysis.cpp25 : FunctionPass(ID), TM(tm), MF(nullptr), MFInitializer(MFInitializer) {
50 MF = new MachineFunction(&F, TM, NextFnNum++,

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