Searched refs:pll (Results 26 - 30 of 30) sorted by relevance

12

/freebsd-11-stable/sys/cam/scsi/
H A Dscsi_ch.h316 u_int8_t pll[2]; /* parameter list length */ member in struct:scsi_send_volume_tag
H A Dscsi_ch.c1925 scsi_ulto2b(sizeof(*parameters), scsi_cmd->pll);
/freebsd-11-stable/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_reset.c1503 uint32_t pll = AR_RTC_PLL_REFDIV_5 | AR_RTC_PLL_DIV2; local
1506 pll |= SM(0x1, AR_RTC_PLL_CLKSEL);
1508 pll |= SM(0x2, AR_RTC_PLL_CLKSEL);
1511 pll |= SM(0xa, AR_RTC_PLL_DIV);
1513 pll |= SM(0xb, AR_RTC_PLL_DIV);
1515 pll |= SM(0xb, AR_RTC_PLL_DIV);
1517 OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
/freebsd-11-stable/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_reset.c1367 u_int32_t pll; local
1607 pll = SM(0x5, AR_RTC_PLL_REFDIV);
1612 pll |= SM(0x1, AR_RTC_PLL_CLKSEL);
1614 pll |= SM(0x2, AR_RTC_PLL_CLKSEL);
1618 pll |= SM(0x28, AR_RTC_PLL_DIV);
1623 pll = 0x142c;
1626 pll |= SM(0x2c, AR_RTC_PLL_DIV);
1629 OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
/freebsd-11-stable/sys/dev/drm2/i915/
H A Di915_reg.h3625 #define _PCH_DPLL(pll) (pll == 0 ? _PCH_DPLL_A : _PCH_DPLL_B)
3632 #define _PCH_FP0(pll) (pll == 0 ? _PCH_FPA0 : _PCH_FPB0)
3633 #define _PCH_FP1(pll) (pll == 0 ? _PCH_FPA1 : _PCH_FPB1)

Completed in 216 milliseconds

12