Searched refs:operand (Results 26 - 50 of 86) sorted by relevance

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/freebsd-11-stable/contrib/gcc/config/i386/
H A Di386.c3159 select the proper ABI location for the operand and not depend on whatever
3266 of the operand. The number of words is returned. In case the parameter
6505 /* Nonzero if the constant value X is a legitimate general operand
7515 CODE is the operand print code from the output string. */
7653 output_operand_lossage ("invalid UNSPEC as operand");
7659 output_operand_lossage ("invalid expression as operand");
7929 error ("unsupported operand size for extended register");
8005 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
8012 z -- print the opcode suffix for the size of the current operand.
8015 w -- print the operand a
12189 ix86_split_to_parts(rtx operand, rtx *parts, enum machine_mode mode) argument
12569 ix86_expand_ashl_const(rtx operand, int count, enum machine_mode mode) argument
17229 ix86_force_to_memory(enum machine_mode mode, rtx operand) argument
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/freebsd-11-stable/contrib/gcc/cp/
H A Dsemantics.c1229 tree operand; local
1239 operand = TREE_VALUE (t);
1245 removed, then the output operand had a type of the proper width;
1247 STRIP_NOPS (operand);
1249 if (!lvalue_or_else (operand, lv_asm))
1250 operand = error_mark_node;
1252 if (operand != error_mark_node
1253 && (TREE_READONLY (operand)
1254 || CP_TYPE_CONST_P (TREE_TYPE (operand))
1257 || TREE_CODE (TREE_TYPE (operand))
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/freebsd-11-stable/contrib/gcc/
H A Dregrename.c768 (2) Any read outside an operand causes any chain it overlaps
770 (3) Any read inside an operand is added if there's already
775 (6) For any write we find in an operand, make a new chain.
813 old_operands[i] = recog_data.operand[i];
831 && insn_data[icode].operand[dup_num].eliminable == 0)
832 old_dups[i] = recog_data.operand[dup_num];
914 old_operands[i] = recog_data.operand[i];
1636 /* For each earlyclobber operand, zap the value data. */
1639 kill_value (recog_data.operand[i], vd);
1653 kill_value (recog_data.operand[
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H A Drecog.c79 /* Contains a vector of operand_alternative structures for every operand.
261 /* If this is an asm and the operand aren't legal, then fail. Likewise if
550 /* If we have a PLUS whose second operand is now a CONST_INT, use
929 /* Return 1 if OP is a valid general operand for machine mode MODE.
1012 /* A register whose class is NO_REGS is not a general operand. */
1068 /* Before reload, we can allow (SUBREG (MEM...)) as a register operand
1096 to be a register operand. */
1124 /* Return 1 if OP is a valid immediate operand for mode MODE.
1151 /* Returns 1 if OP is an operand that is a CONST_INT. */
1166 /* Returns 1 if OP is an operand tha
2666 reg_fits_class_p(rtx operand, enum reg_class cl, int offset, enum machine_mode mode) argument
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H A Dipa-reference.c433 parameter is the tree node for the caller and the second operand is
441 tree operand;
445 for (operand = operand_list;
446 operand != NULL_TREE;
447 operand = TREE_CHAIN (operand))
449 tree argument = TREE_VALUE (operand);
477 should be converted to use the operand scanner. */
440 tree operand; local
H A Dexpmed.c282 is false; else the mode of the specified operand. If OPNO is -1,
324 if (data->operand[opno].mode == VOIDmode)
326 return data->operand[opno].mode;
340 One is BITS_PER_WORD, and the other is the size of operand 3
343 If operand 3 of the insv pattern is VOIDmode, then we will use BITS_PER_WORD
344 else, we use the mode of operand 3. */
413 enum machine_mode mode0 = insn_data[icode].operand[0].mode;
414 enum machine_mode mode1 = insn_data[icode].operand[1].mode;
415 enum machine_mode mode2 = insn_data[icode].operand[2].mode;
419 if (! (*insn_data[icode].operand[
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H A Dpostreload.c190 hard register. It then replaces the operand with the hard register
356 For each non-register operand in the insn, see if any hard regs are
357 known to be equivalent to that operand. Record the alternatives which
369 /* For each operand, all registers that are equivalent to it. */
379 /* Array of vectors recording, for each operand and each alternative,
380 which hard register to substitute, or -1 if the operand should be
401 /* For each operand, find out which regs are equivalent. */
414 if (LABEL_P (recog_data.operand[i])
415 || (CONSTANT_P (recog_data.operand[i])
419 op = recog_data.operand[
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H A Dtree-vectorizer.c93 the operand 'b' (S1), and gets the relevant vector def 'vb' from the
1629 OPERAND - operand of a stmt in LOOP.
1639 vect_is_simple_use (tree operand, loop_vec_info loop_vinfo, tree *def_stmt,
1651 fprintf (vect_dump, "vect_is_simple_use: operand ");
1652 print_generic_expr (vect_dump, operand, TDF_SLIM);
1655 if (TREE_CODE (operand) == INTEGER_CST || TREE_CODE (operand) == REAL_CST)
1661 if (TREE_CODE (operand) != SSA_NAME)
1668 *def_stmt = SSA_NAME_DEF_STMT (operand);
1689 *def = operand;
1638 vect_is_simple_use(tree operand, loop_vec_info loop_vinfo, tree *def_stmt, tree *def, enum vect_def_type *dt) argument
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H A Dregmove.c432 actual register declaration easily (the asm operand will have
990 "Fixed operand of insn %d.\n",
1146 /* Now scan through the operands looking for a source operand
1147 which is supposed to match the destination operand.
1149 operand.
1151 the source operand. */
1164 src = recog_data.operand[op_no];
1165 dst = recog_data.operand[match_no];
1195 /* op_no/src must be a read-only operand, and
1196 match_operand/dst must be a write-only operand
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Disassembler/llvm/
H A DDisassemblerLLVMC.cpp803 Operand operand; variable
806 if ((std::tie(operand, iter) = ParseIntelIndexedAccess(osi, ose),
807 operand.IsValid()) ||
808 (std::tie(operand, iter) = ParseIntelDerefAccess(osi, ose),
809 operand.IsValid()) ||
810 (std::tie(operand, iter) = ParseARMOffsetAccess(osi, ose),
811 operand.IsValid()) ||
812 (std::tie(operand, iter) = ParseARMDerefAccess(osi, ose),
813 operand.IsValid()) ||
814 (std::tie(operand, ite
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Target/
H A DStackFrame.cpp1241 GetBaseExplainingValue(const Instruction::Operand &operand, argument
1243 switch (operand.m_type) {
1253 if (operand.m_children[0].m_type == Instruction::Operand::Type::Immediate) {
1254 immediate_child = &operand.m_children[0];
1255 variable_child = &operand.m_children[1];
1256 } else if (operand.m_children[1].m_type ==
1258 immediate_child = &operand.m_children[1];
1259 variable_child = &operand.m_children[0];
1285 register_context.GetRegisterInfoByName(operand.m_register.AsCString());
1294 return std::make_pair(&operand,
1304 GetBaseExplainingDereference(const Instruction::Operand &operand, RegisterContext &register_context, lldb::addr_t addr) argument
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/freebsd-11-stable/contrib/binutils/gas/config/
H A Dtc-alpha.c397 /* A table to map the spelling of a relocation operand into an appropriate
853 /* A relocation operand can be placed after the normal operand on an
875 as_bad (_("No relocation operand"));
885 as_bad (_("Unknown relocation operand: !%s"), p);
1024 const struct alpha_operand *operand = &alpha_operands[*opidx];
1027 if (operand->flags & AXP_OPERAND_FAKE)
1033 if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
1038 /* Match operand type with expression type. */
1039 switch (operand
1017 const struct alpha_operand *operand = &alpha_operands[*opidx]; local
1612 const struct alpha_operand *operand = (const struct alpha_operand *) 0; local
1801 insert_operand(unsigned insn, const struct alpha_operand *operand, offsetT val, char *file, unsigned line) argument
1861 const struct alpha_operand *operand = &alpha_operands[*argidx]; local
5343 const struct alpha_operand *operand; local
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Symbol/
H A DPostfixExpression.cpp66 Node *operand = stack.pop_back_val();
67 stack.push_back(MakeNode<UnaryOpNode>(alloc, *op_type, *operand));
/freebsd-11-stable/contrib/llvm-project/compiler-rt/lib/builtins/
H A Dfp_add_impl.inc79 // The sign of the result is the sign of the larger operand, a. If they
/freebsd-11-stable/contrib/llvm-project/lldb/include/lldb/Symbol/
H A DPostfixExpression.h138 UnaryOpNode(OpType op_type, Node &operand) argument
139 : Node(UnaryOp), m_op_type(op_type), m_operand(&operand) {}
/freebsd-11-stable/contrib/binutils/include/opcode/
H A Dcgen.h101 an object (ifield, hardware, operand, insn, whatever) and are specified
179 /* For each domain (ifld,hw,operand,insn), list of attributes. */
631 /* "nil" indicator for the operand instance table */
635 structure of an operand's hw-index value, if it exists. */
652 /* This struct defines each entry in the operand table. */
662 /* The hardware element associated with this operand. */
675 /* The number of bits in the operand.
680 /* The (possibly-multi) ifield used as an index for this operand, if it
702 #define CGEN_OPERAND_ATTRS(operand) (&(operand)
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/freebsd-11-stable/contrib/llvm-project/libunwind/src/
H A DDwarfParser.hpp393 uint8_t operand;
719 operand = opcode & 0x3F;
722 reg = operand;
734 operand, offset);
737 codeOffset += operand * cieInfo.codeAlignFactor;
742 reg = operand;
751 static_cast<uint64_t>(operand));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp46 // 6. For each operand, its encoding is an entry from OperandEncoding
50 // been read. For example, a register operand could be stored in the R/M
204 // instruction as having them. Also sets the instruction's default operand,
811 // Consult an operand type to determine the meaning of the reg or R/M field. If
812 // the operand is an XMM operand, for example, an operand would be XMM0 instead
815 // @param insn - The instruction containing the operand.
816 // @param type - The operand type.
824 // Consult an operand specifie
1866 translateImmediate(MCInst &mcInst, uint64_t immediate, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) argument
2170 translateRM(MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) argument
2233 translateOperand(MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis) argument
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/freebsd-11-stable/contrib/gcc/config/rs6000/
H A Drs6000.c2185 vsplt's operand; if STEP > 1, one in STEP elements is set to the vsplt's
2186 operand and the others are set to the value of the operand's msb. */
2215 /* Check if SPLAT_VAL can really be the operand of a vspltis[bhw]. */
2672 /* Return 1 for an operand in small memory on V.4/eabi. */
2716 /* Return true if either operand is a general purpose register. */
3620 sub-words of a TFmode operand, which is what we had before. */
4043 /* Recognize the case where operand[1] is a reference to thread-local
6759 enum machine_mode tmode = insn_data[icode].operand[0].mode;
6760 enum machine_mode mode0 = insn_data[icode].operand[
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/freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DSValBuilder.cpp92 NonLoc SValBuilder::makeNonLoc(const SymExpr *operand, argument
94 assert(operand);
96 return nonloc::SymbolVal(SymMgr.getCastSymbol(operand, fromTy, toTy));
/freebsd-11-stable/contrib/binutils/gas/
H A Dexpr.c26 Here, "operand"s are of expressions, not instructions. */
43 static segT operand (expressionS *, enum expr_mode);
709 /* In: Input_line_pointer points to 1st char of operand, which may
713 The operand may have been empty: in this case X_op == O_absent. function
714 Input_line_pointer->(next non-blank) char after operand. */
717 operand (expressionS *expressionP, enum expr_mode mode)
734 SKIP_WHITESPACE (); /* Leading whitespace is part of operand. */
894 end of operand. */
899 as_fatal (_("expr.c(operand): bad atof_generic return val %d"),
985 of the operand
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/freebsd-11-stable/contrib/llvm-project/clang/include/clang/AST/
H A DExprObjC.h1593 ObjCIndirectCopyRestoreExpr(Expr *operand, QualType type, bool shouldCopy) argument
1595 operand->isTypeDependent(), operand->isValueDependent(),
1596 operand->isInstantiationDependent(),
1597 operand->containsUnexpandedParameterPack()),
1598 Operand(operand) {
/freebsd-11-stable/contrib/diff/src/
H A Dcmp.c112 try_help (char const *reason_msgid, char const *operand)
115 error (0, 0, _(reason_msgid), operand);
124 *operand ARGPTR of --ignore-initial, updating *ARGPTR to point
125 *after the operand. If DELIMITER is nonzero, the operand may be
264 try_help ("missing operand after `%s'", argv[argc - 1]);
276 try_help ("extra operand `%s'", argv[optind]);
110 try_help(char const *reason_msgid, char const *operand) argument
/freebsd-11-stable/contrib/gcc/config/arm/
H A Darm.c1671 SOURCE is the other operand (a register, or a null-pointer for SET);
2772 /* Compute operand 2 of the call insn. */
3076 /* Return 1 if the operand is a SYMBOL_REF for a function known to be
3201 /* Return nonzero if X is a legitimate immediate operand when compiling
3522 /* Return nonzero if X is a valid ARM state address operand. */
3607 /* Return nonzero if INDEX is valid for an address index operand in
4518 operand. */
5204 /* If nonzero, SHIFT_OPNUM contains the operand number of a shifted
5205 operand for INSN. If we have a shifted input operand an
9528 output_return_instruction(rtx operand, int really_return, int reverse) argument
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/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM64/
H A DEmulateInstructionARM64.cpp1143 const uint64_t operand = local
1148 if (m_ignore_conditions || ((operand == 0) == is_zero)) {
1179 const uint64_t operand = local
1184 if (m_ignore_conditions || Bit32(operand, bit_pos) == bit_val) {

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