Searched refs:MF (Results 51 - 75 of 870) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DCFGuardLongjmp.cpp49 bool runOnMachineFunction(MachineFunction &MF) override;
61 bool CFGuardLongjmp::runOnMachineFunction(MachineFunction &MF) { argument
64 if (!MF.getMMI().getModule()->getModuleFlag("cfguard"))
68 if (!MF.getFunction().callsFunctionThatReturnsTwice())
75 for (MachineBasicBlock &MBB : MF) {
111 raw_svector_ostream(SymbolName) << "$cfgsj_" << MF.getName() << SetjmpNum++;
112 MCSymbol *SjSymbol = MF.getContext().getOrCreateSymbol(SymbolName);
114 Setjmp->setPostInstrSymbol(MF, SjSymbol);
115 MF.addLongjmpTarget(SjSymbol);
H A DRegUsageInfoCollector.cpp57 bool runOnMachineFunction(MachineFunction &MF) override;
61 static void computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF);
85 static bool isCallableFunction(const MachineFunction &MF) { argument
86 switch (MF.getFunction().getCallingConv()) {
101 bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) { argument
102 MachineRegisterInfo *MRI = &MF.getRegInfo();
103 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
104 const LLVMTargetMachine &TM = MF.getTarget();
108 << MF.getName() << '\n');
111 if (!isCallableFunction(MF)) {
196 computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF) argument
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H A DResetMachineFunctionPass.cpp54 bool runOnMachineFunction(MachineFunction &MF) override {
60 make_scope_exit([&MF]() { MF.getRegInfo().clearVirtRegTypes(); });
62 if (MF.getProperties().hasProperty(
66 LLVM_DEBUG(dbgs() << "Resetting: " << MF.getName() << '\n');
68 MF.reset();
70 const Function &F = MF.getFunction();
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.h50 getPointerRegClass(const MachineFunction &MF,
64 const MachineFunction &MF,
69 bool requiresRegisterScavenging(const MachineFunction &MF) const override {
72 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
75 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
78 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
79 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
81 BitVector getReservedRegs(const MachineFunction &MF) const override;
95 Register getFrameRegister(const MachineFunction &MF) const override;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86IndirectThunks.cpp72 // return `true` if `MMI` or `MF` was modified
73 bool run(MachineModuleInfo &MMI, MachineFunction &MF);
78 bool mayUseThunk(const MachineFunction &MF) { argument
79 const auto &STI = MF.getSubtarget<X86Subtarget>();
85 void populateThunk(MachineFunction &MF);
90 bool mayUseThunk(const MachineFunction &MF) { argument
91 return MF.getSubtarget<X86Subtarget>().useLVIControlFlowIntegrity();
96 void populateThunk(MachineFunction &MF) { argument
99 MachineBasicBlock *Entry = &MF.front();
101 while (MF
148 runTIs(MachineModuleInfo &MMI, MachineFunction &MF, std::tuple<ThunkInserterT...> &ThunkInserters) argument
168 populateThunk(MachineFunction &MF) argument
312 MachineFunction &MF = MMI.getOrCreateMachineFunction(*F); local
322 run(MachineModuleInfo &MMI, MachineFunction &MF) argument
360 runOnMachineFunction(MachineFunction &MF) argument
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H A DX86FrameLowering.h53 void emitStackProbe(MachineFunction &MF, MachineBasicBlock &MBB,
58 void inlineStackProbe(MachineFunction &MF,
67 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
68 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
70 void adjustForSegmentedStacks(MachineFunction &MF,
73 void adjustForHiPEPrologue(MachineFunction &MF,
76 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
80 assignCalleeSavedSpillSlots(MachineFunction &MF,
94 bool hasFP(const MachineFunction &MF) const override;
95 bool hasReservedCallFrame(const MachineFunction &MF) cons
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.cpp47 MipsRegisterInfo::getPointerRegClass(const MachineFunction &MF, argument
49 MipsABIInfo ABI = MF.getSubtarget<MipsSubtarget>().getABI();
68 MachineFunction &MF) const {
75 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
76 return 28 - TFI->hasFP(MF);
93 MipsRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
94 const MipsSubtarget &Subtarget = MF->getSubtarget<MipsSubtarget>();
95 const Function &F = MF->getFunction();
124 MipsRegisterInfo::getCallPreservedMask(const MachineFunction &MF, argument
126 const MipsSubtarget &Subtarget = MF
260 MachineFunction &MF = *MI.getParent()->getParent(); local
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H A DMipsFrameLowering.h33 bool hasFP(const MachineFunction &MF) const override;
35 bool hasBP(const MachineFunction &MF) const;
39 bool enableShrinkWrapping(const MachineFunction &MF) const override {
44 eliminateCallFramePseudoInstr(MachineFunction &MF,
49 uint64_t estimateStackSize(const MachineFunction &MF) const;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.h112 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
114 getCalleeSavedRegsViaCopy(const MachineFunction *MF) const;
115 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
118 const uint32_t *getTLSCallPreservedMask(const MachineFunction &MF) const;
119 const uint32_t *getSjLjDispatchPreservedMask(const MachineFunction &MF) const;
129 const uint32_t *getThisReturnPreservedMask(const MachineFunction &MF,
133 getIntraCallClobberedRegs(const MachineFunction *MF) const override;
135 BitVector getReservedRegs(const MachineFunction &MF) const override;
136 bool isAsmClobberable(const MachineFunction &MF,
140 getPointerRegClass(const MachineFunction &MF,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEFrameLowering.cpp34 void VEFrameLowering::emitPrologueInsns(MachineFunction &MF, argument
42 *static_cast<const VEInstrInfo *>(MF.getSubtarget().getInstrInfo());
72 void VEFrameLowering::emitEpilogueInsns(MachineFunction &MF, argument
80 *static_cast<const VEInstrInfo *>(MF.getSubtarget().getInstrInfo());
106 void VEFrameLowering::emitSPAdjustment(MachineFunction &MF, argument
112 *static_cast<const VEInstrInfo *>(MF.getSubtarget().getInstrInfo());
137 void VEFrameLowering::emitSPExtend(MachineFunction &MF, MachineBasicBlock &MBB, argument
142 *static_cast<const VEInstrInfo *>(MF.getSubtarget().getInstrInfo());
174 void VEFrameLowering::emitPrologue(MachineFunction &MF, argument
176 assert(&MF
254 eliminateCallFramePseudoInstr( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument
269 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument
298 getFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg) const argument
319 determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const argument
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H A DVERegisterInfo.cpp36 VERegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
40 const uint32_t *VERegisterInfo::getCallPreservedMask(const MachineFunction &MF, argument
49 BitVector VERegisterInfo::getReservedRegs(const MachineFunction &MF) const {
73 VERegisterInfo::getPointerRegClass(const MachineFunction &MF, argument
78 static void replaceFI(MachineFunction &MF, MachineBasicBlock::iterator II, argument
96 MachineFunction &MF = *MI.getParent()->getParent(); local
97 const VEFrameLowering *TFI = getFrameLowering(MF);
101 Offset = TFI->getFrameIndexReference(MF, FrameIndex, FrameReg);
105 replaceFI(MF, II, MI, dl, FIOperandNum, Offset, FrameReg);
108 Register VERegisterInfo::getFrameRegister(const MachineFunction &MF) cons
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyLateEHPrepare.cpp33 bool runOnMachineFunction(MachineFunction &MF) override;
34 bool addCatches(MachineFunction &MF);
35 bool replaceFuncletReturns(MachineFunction &MF);
36 bool removeUnnecessaryUnreachables(MachineFunction &MF);
37 bool addExceptionExtraction(MachineFunction &MF);
38 bool restoreStackPointer(MachineFunction &MF);
61 MachineFunction *MF = MI->getParent()->getParent(); local
77 if (MBB == &MF->front())
102 bool WebAssemblyLateEHPrepare::runOnMachineFunction(MachineFunction &MF) { argument
105 << MF
125 addCatches(MachineFunction &MF) argument
143 replaceFuncletReturns(MachineFunction &MF) argument
184 removeUnnecessaryUnreachables( MachineFunction &MF) argument
235 addExceptionExtraction(MachineFunction &MF) argument
364 restoreStackPointer(MachineFunction &MF) argument
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H A DWebAssemblyRegNumbering.cpp44 bool runOnMachineFunction(MachineFunction &MF) override;
61 bool WebAssemblyRegNumbering::runOnMachineFunction(MachineFunction &MF) { argument
64 << MF.getName() << '\n');
66 WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
67 MachineRegisterInfo &MRI = MF.getRegInfo();
73 MachineBasicBlock &EntryMBB = MF.front();
87 unsigned NumVRegs = MF.getRegInfo().getNumVirtRegs();
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXReplaceImageHandles.cpp37 bool runOnMachineFunction(MachineFunction &MF) override;
44 void replaceImageHandle(MachineOperand &Op, MachineFunction &MF);
45 bool findIndexForHandle(MachineOperand &Op, MachineFunction &MF,
55 bool NVPTXReplaceImageHandles::runOnMachineFunction(MachineFunction &MF) { argument
59 for (MachineFunction::iterator BI = MF.begin(), BE = MF.end(); BI != BE;
80 MachineFunction &MF = *MI.getParent()->getParent(); local
87 replaceImageHandle(TexHandle, MF);
91 replaceImageHandle(SampHandle, MF);
102 replaceImageHandle(SurfHandle, MF);
125 replaceImageHandle(MachineOperand &Op, MachineFunction &MF) argument
133 findIndexForHandle(MachineOperand &Op, MachineFunction &MF, unsigned &Idx) argument
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/freebsd-11-stable/tools/tools/ath/athalq/
H A Dar5210_ds.c38 #define MF(_v, _f) ( !! ((_v) & (_f))) macro
55 MF(txs.ds_status0, AR_FrmXmitOK),
56 MF(txs.ds_status0, AR_ExcessiveRetries),
57 MF(txs.ds_status0, AR_FIFOUnderrun),
58 MF(txs.ds_status0, AR_Filtered));
67 MF(txs.ds_status1, AR_Done),
95 MF(txc.ds_ctl0, AR_RTSCTSEnable),
96 MF(txc.ds_ctl0, AR_ClearDestMask),
97 MF(txc.ds_ctl0, AR_AntModeXmit));
100 MF(tx
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H A Dar5211_ds.c38 #define MF(_v, _f) ( !! ((_v) & (_f))) macro
55 MF(txs.ds_status0, AR_FrmXmitOK),
56 MF(txs.ds_status0, AR_ExcessiveRetries),
57 MF(txs.ds_status0, AR_FIFOUnderrun),
58 MF(txs.ds_status0, AR_Filtered));
68 MF(txs.ds_status1, AR_Done),
96 MF(txc.ds_ctl0, AR_RTSCTSEnable),
97 MF(txc.ds_ctl0, AR_VEOL),
98 MF(txc.ds_ctl0, AR_ClearDestMask),
99 MF(tx
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H A Dar5212_ds.c38 #define MF(_v, _f) ( !! ((_v) & (_f))) macro
52 MF(txs.u.tx.status1, AR_Done),
57 MF(txs.u.tx.status0, AR_FrmXmitOK),
58 MF(txs.u.tx.status0, AR_ExcessiveRetries),
59 MF(txs.u.tx.status0, AR_FIFOUnderrun),
60 MF(txs.u.tx.status0, AR_Filtered));
70 MF(txs.u.tx.status1, AR_Done),
75 MF(txs.u.tx.status1, AR_CompSuccess),
76 MF(txs.u.tx.status1, AR_XmitAtenna));
102 MF(tx
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFixVGPRCopies.cpp35 bool runOnMachineFunction(MachineFunction &MF) override;
48 bool SIFixVGPRCopies::runOnMachineFunction(MachineFunction &MF) { argument
49 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
54 for (MachineBasicBlock &MBB : MF) {
59 MI.addOperand(MF,
H A DAMDGPUMachineFunction.cpp16 AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) : argument
21 Mode(MF.getFunction(), MF.getSubtarget<GCNSubtarget>()),
22 IsEntryFunction(AMDGPU::isEntryFunctionCC(MF.getFunction().getCallingConv())),
23 NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath),
26 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(MF);
30 const Function &F = MF.getFunction();
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFFrameLowering.h26 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
27 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
29 bool hasFP(const MachineFunction &MF) const override;
30 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
34 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.cpp43 RISCVRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
44 auto &Subtarget = MF->getSubtarget<RISCVSubtarget>();
45 if (MF->getFunction().hasFnAttribute("interrupt")) {
68 BitVector RISCVRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
69 const RISCVFrameLowering *TFI = getFrameLowering(MF);
74 if (MF.getSubtarget<RISCVSubtarget>().isRegisterReservedByUser(Reg))
83 if (TFI->hasFP(MF))
87 if (TFI->hasBP(MF))
93 bool RISCVRegisterInfo::isAsmClobberable(const MachineFunction &MF, argument
95 return !MF
112 MachineFunction &MF = *MI.getParent()->getParent(); local
156 getCallPreservedMask(const MachineFunction & MF, CallingConv::ID ) const argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcFrameLowering.cpp40 void SparcFrameLowering::emitSPAdjustment(MachineFunction &MF, argument
49 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
85 void SparcFrameLowering::emitPrologue(MachineFunction &MF, argument
87 SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
89 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
90 MachineFrameInfo &MFI = MF.getFrameInfo();
91 const SparcSubtarget &Subtarget = MF.getSubtarget<SparcSubtarget>();
100 bool NeedsStackRealignment = RegInfo.needsStackRealignment(MF);
108 report_fatal_error("Function \"" + Twine(MF.getName()) + "\" required "
140 if (MFI.adjustsStack() && hasReservedCallFrame(MF))
205 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument
220 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument
262 getFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg) const argument
375 determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp38 MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
39 const MSP430FrameLowering *TFI = getFrameLowering(*MF);
40 const Function* F = &MF->getFunction();
64 if (TFI->hasFP(*MF))
73 BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
75 const MSP430FrameLowering *TFI = getFrameLowering(MF);
88 if (TFI->hasFP(MF)) {
97 MSP430RegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind) argument
110 MachineFunction &MF = *MBB.getParent(); local
111 const MSP430FrameLowering *TFI = getFrameLowering(MF);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRFrameLowering.h22 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
23 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
24 bool hasFP(const MachineFunction &MF) const override;
34 bool hasReservedCallFrame(const MachineFunction &MF) const override;
35 bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override;
36 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
39 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInstructionSelect.cpp66 bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) { argument
68 if (MF.getProperties().hasProperty(
72 LLVM_DEBUG(dbgs() << "Selecting function: " << MF.getName() << '\n');
73 GISelKnownBits &KB = getAnalysis<GISelKnownBitsAnalysis>().get(MF);
76 InstructionSelector *ISel = MF.getSubtarget().getInstructionSelector();
79 ISel->setupMF(MF, KB, CoverageInfo);
82 MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
84 // FIXME: There are many other MF/MFI fields we need to initialize.
86 MachineRegisterInfo &MRI = MF.getRegInfo();
93 if (const MachineInstr *MI = machineFunctionIsIllegal(MF)) {
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