/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiInstrInfo.cpp | 34 void LanaiInstrInfo::copyPhysReg(MachineBasicBlock &MBB, argument 44 BuildMI(MBB, Position, DL, get(Lanai::OR_I_LO), DestinationRegister) 50 MachineBasicBlock &MBB, MachineBasicBlock::iterator Position, 55 if (Position != MBB.end()) { 62 BuildMI(MBB, Position, DL, get(Lanai::SW_RI)) 70 MachineBasicBlock &MBB, MachineBasicBlock::iterator Position, 75 if (Position != MBB.end()) { 82 BuildMI(MBB, Position, DL, get(Lanai::LDW_RI), DestinationRegister) 420 MachineBasicBlock *MBB = CmpInstr.getParent(); local 421 for (MachineBasicBlock::succ_iterator SI = MBB 49 storeRegToStackSlot( MachineBasicBlock &MBB, MachineBasicBlock::iterator Position, unsigned SourceRegister, bool IsKill, int FrameIndex, const TargetRegisterClass *RegisterClass, const TargetRegisterInfo * ) const argument 69 loadRegFromStackSlot( MachineBasicBlock &MBB, MachineBasicBlock::iterator Position, unsigned DestinationRegister, int FrameIndex, const TargetRegisterClass *RegisterClass, const TargetRegisterInfo * ) const argument 562 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TrueBlock, MachineBasicBlock *&FalseBlock, SmallVectorImpl<MachineOperand> &Condition, bool AllowModify) const argument 660 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TrueBlock, MachineBasicBlock *FalseBlock, ArrayRef<MachineOperand> Condition, const DebugLoc &DL, int *BytesAdded) const argument 692 removeBranch(MachineBasicBlock &MBB, int *BytesRemoved) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsFrameLowering.h | 45 MachineBasicBlock &MBB,
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H A D | Mips16ISelDAGToDAG.cpp | 70 MachineBasicBlock &MBB = MF.front(); 71 MachineBasicBlock::iterator I = MBB.begin(); 83 BuildMI(MBB, I, DL, TII.get(Mips::LiRxImmX16), V0) 85 BuildMI(MBB, I, DL, TII.get(Mips::AddiuRxPcImmX16), V1) 88 BuildMI(MBB, I, DL, TII.get(Mips::SllX16), V2).addReg(V0).addImm(16); 89 BuildMI(MBB, I, DL, TII.get(Mips::AdduRxRyRz16), GlobalBaseReg)
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | OptimizePHIs.cpp | 62 bool OptimizeBB(MachineBasicBlock &MBB); 167 bool OptimizePHIs::OptimizeBB(MachineBasicBlock &MBB) { argument 170 MII = MBB.begin(), E = MBB.end(); MII != E; ) {
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H A D | StackColoring.cpp | 457 void dumpBB(MachineBasicBlock *MBB) const; 540 LLVM_DUMP_METHOD void StackColoring::dumpBB(MachineBasicBlock *MBB) const { 541 LivenessMap::const_iterator BI = BlockLiveness.find(MBB); 552 for (MachineBasicBlock *MBB : depth_first(MF)) { 553 dbgs() << "Inspecting block #" << MBB->getNumber() << " [" 554 << MBB->getName() << "]\n"; 555 dumpBB(MBB); 639 for (MachineBasicBlock *MBB : depth_first(MF)) { 645 for (MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), 646 PE = MBB [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEInstrInfo.cpp | 55 MachineBasicBlock &MBB = *MI.getParent(); local 56 MachineFunction &MF = *MBB.getParent(); 59 DebugLoc dl = MBB.findDebugLoc(MI); 76 // Create new MBB 77 MachineBasicBlock *BB = &MBB;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyRegisterInfo.cpp | 59 MachineBasicBlock &MBB = *MI.getParent(); local 60 MachineFunction &MF = *MBB.getParent(); 121 BuildMI(MBB, *II, II->getDebugLoc(), TII->get(WebAssembly::CONST_I32), 125 BuildMI(MBB, *II, II->getDebugLoc(), TII->get(WebAssembly::ADD_I32),
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H A D | WebAssemblyCallIndirectFixup.cpp | 110 for (MachineBasicBlock &MBB : MF) { 111 for (MachineInstr &MI : MBB) {
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H A D | WebAssemblyRegStackify.cpp | 324 const MachineBasicBlock *MBB = Def->getParent(); local 326 for (auto E = MBB->end(); NextI != E && NextI->isDebugInstr(); ++NextI) 401 const MachineBasicBlock &MBB, 484 MachineInstr *Def, MachineBasicBlock &MBB, 491 MBB.splice(Insert, &MBB, Def); 529 unsigned Reg, MachineOperand &Op, MachineInstr &Def, MachineBasicBlock &MBB, 539 TII->reMaterialize(MBB, Insert, NewReg, 0, Def, *TRI); 597 unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, 605 MBB 400 oneUseDominatesOtherUses(unsigned Reg, const MachineOperand &OneUse, const MachineBasicBlock &MBB, const MachineRegisterInfo &MRI, const MachineDominatorTree &MDT, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI) argument 483 moveForSingleUse(unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI) argument 528 rematerializeCheapDef( unsigned Reg, MachineOperand &Op, MachineInstr &Def, MachineBasicBlock &MBB, MachineBasicBlock::instr_iterator Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII, const WebAssemblyRegisterInfo *TRI) argument 596 moveAndTeeForMultiUse( unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SlotIndexes.h | 327 /// MBBRanges - Map MBB number to (start, stop) indexes. 331 /// and MBB id. 363 void repairIndexesInRange(MachineBasicBlock *MBB, 421 const MachineBasicBlock *MBB = MI.getParent(); local 422 assert(MBB && "MI must be inserted in a basic block"); 423 MachineBasicBlock::const_iterator I = MI, B = MBB->begin(); 426 return getMBBStartIdx(MBB); 438 const MachineBasicBlock *MBB = MI.getParent(); local 439 assert(MBB && "MI must be inserted in a basic block"); 440 MachineBasicBlock::const_iterator I = MI, E = MBB [all...] |
H A D | ReachingDefAnalysis.h | 62 /// All reaching defs of a given RegUnit for a given MBB. 64 /// All reaching defs of all reg units for a given MBB 104 MachineInstr *getInstFromId(MachineBasicBlock *MBB, int InstId); 115 MachineInstr *getLocalLiveOutMIDef(MachineBasicBlock *MBB,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCOptAddrMode.cpp | 103 bool processBasicBlock(MachineBasicBlock &MBB); 150 MachineBasicBlock *MBB = User->getOperand(BBOperandIdx).getMBB(); local 151 if (MBB->empty()) { 153 assert(InstBB != MBB && "Instruction found in empty MBB"); 154 if (!MDT->dominates(InstBB, MBB)) 158 User = &*MBB->rbegin(); 468 bool ARCOptAddrMode::processBasicBlock(MachineBasicBlock &MBB) { argument 470 for (auto MI = MBB.begin(), ME = MBB [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonInstrInfo.h | 82 /// Analyze the branching code at the end of MBB, returning 106 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 111 /// Remove the branching code at the end of the specific MBB. 114 unsigned removeBranch(MachineBasicBlock &MBB, 127 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 142 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, 159 /// of specified accumulated instruction latencies in the specified MBB to 164 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, 175 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 183 void storeRegToStackSlot(MachineBasicBlock &MBB, [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZRegisterInfo.cpp | 261 MachineBasicBlock &MBB = *MI->getParent(); local 262 MachineFunction &MF = *MBB.getParent(); 313 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset); 321 BuildMI(MBB, MI, DL, TII->get(LAOpcode),ScratchReg) 326 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset); 327 BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg) 355 // and local to one MBB with not too much interferring registers. Otherwise 364 // Check that the two virtual registers are local to MBB. 365 MachineBasicBlock *MBB = MI->getParent(); local 372 if ((!FirstMI_GR128 || FirstMI_GR128->getParent() != MBB) || [all...] |
H A D | SystemZInstrInfo.cpp | 67 MachineBasicBlock *MBB = MI->getParent(); local 68 MachineFunction &MF = *MBB->getParent(); 73 MBB->insert(MI, EarlierMI); 117 MachineBasicBlock *MBB = MI->getParent(); local 118 MachineFunction &MF = *MBB->getParent(); 212 MachineBasicBlock *MBB = MI->getParent(); local 213 MachineFunction &MF = *MBB->getParent(); 221 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32) 226 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::SLLG), Reg64) 232 BuildMI(*MBB, M 246 emitGRX32Move(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, unsigned LowLowOpcode, unsigned Size, bool KillSrc, bool UndefSrc) const argument 353 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 445 removeBranch(MachineBasicBlock &MBB, int *BytesRemoved) const argument 477 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const argument 533 canInsertSelect(const MachineBasicBlock &MBB, ArrayRef<MachineOperand> Pred, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument 566 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, unsigned DstReg, ArrayRef<MachineOperand> Pred, unsigned TrueReg, unsigned FalseReg) const argument 683 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, BranchProbability Probability) const argument 712 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, BranchProbability Probability) const argument 766 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const argument 871 storeRegToStackSlot( MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 886 loadRegFromStackSlot( MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 956 MachineBasicBlock *MBB = MI.getParent(); local 1740 loadImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned Reg, uint64_t Value) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
H A D | BPFMIPeephole.cpp | 172 for (MachineBasicBlock &MBB : *MF) { 173 for (MachineInstr &MI : MBB) { 219 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(BPF::SUBREG_TO_REG), DstReg) 289 for (MachineBasicBlock &MBB : *MF) { 290 for (MachineInstr &MI : MBB) { 410 for (MachineBasicBlock &MBB : *MF) { 411 for (MachineInstr &MI : MBB) { 486 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(BPF::MOV_rr), DstReg)
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H A D | BPFMIChecking.cpp | 157 for (MachineBasicBlock &MBB : *MF) { 158 for (MachineInstr &MI : MBB) {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMExpandPseudoInsts.cpp | 63 bool ExpandMI(MachineBasicBlock &MBB, 66 bool ExpandMBB(MachineBasicBlock &MBB); 72 void ExpandMOV32BitImm(MachineBasicBlock &MBB, 74 bool ExpandCMP_SWAP(MachineBasicBlock &MBB, 79 bool ExpandCMP_SWAP_64(MachineBasicBlock &MBB, 471 MachineBasicBlock &MBB = *MI.getParent(); local 479 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), 582 MachineBasicBlock &MBB = *MI.getParent(); local 590 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), 658 MachineBasicBlock &MBB local 749 MachineBasicBlock &MBB = *MI.getParent(); local 826 ExpandMOV32BitImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI) argument 927 ExpandCMP_SWAP(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned LdrexOp, unsigned StrexOp, unsigned UxtOp, MachineBasicBlock::iterator &NextMBBI) argument 1048 ExpandCMP_SWAP_64(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator &NextMBBI) argument 1153 ExpandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator &NextMBBI) argument 1958 ExpandMBB(MachineBasicBlock &MBB) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIRegisterInfo.cpp | 342 void SIRegisterInfo::materializeFrameBaseRegister(MachineBasicBlock *MBB, argument 346 MachineBasicBlock::iterator Ins = MBB->begin(); 349 if (Ins != MBB->end()) 352 MachineFunction *MF = MBB->getParent(); 356 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_MOV_B32_e32), BaseReg) 366 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::S_MOV_B32), OffsetReg) 368 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_MOV_B32_e32), FIReg) 371 TII->getAddNoCarry(*MBB, Ins, DL, BaseReg) 396 MachineBasicBlock *MBB = MI.getParent(); local 397 MachineFunction *MF = MBB 549 MachineBasicBlock *MBB = MI->getParent(); local 580 MachineBasicBlock *MBB = MI->getParent(); local 624 MachineBasicBlock *MBB = MI->getParent(); local 749 MachineBasicBlock *MBB = MI->getParent(); local 861 MachineBasicBlock *MBB = MI->getParent(); local 973 MachineBasicBlock *MBB = MI->getParent(); local [all...] |
H A D | SIInstrInfo.h | 196 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 200 unsigned calculateLDSSpillAddress(MachineBasicBlock &MBB, MachineInstr &MI, 204 void materializeImmediate(MachineBasicBlock &MBB, 213 unsigned insertNE(MachineBasicBlock *MBB, 217 unsigned insertEQ(MachineBasicBlock *MBB, 221 void storeRegToStackSlot(MachineBasicBlock &MBB, 227 void loadRegFromStackSlot(MachineBasicBlock &MBB, 266 unsigned insertIndirectBranch(MachineBasicBlock &MBB, 272 bool analyzeBranchImpl(MachineBasicBlock &MBB, 279 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBloc [all...] |
H A D | SIFixupVectorISel.cpp | 155 static bool fixupGlobalSaddr(MachineBasicBlock &MBB, argument 165 for (I = MBB.begin(); I != MBB.end(); I = Next) { 186 NewGlob = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcd)); 229 for (MachineBasicBlock &MBB : MF) { 231 FuncModified |= fixupGlobalSaddr(MBB, MF, MRI, ST, TII, TRI);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FloatingPoint.cpp | 126 static unsigned calcLiveInMask(MachineBasicBlock *MBB, bool RemoveFPs) { argument 128 for (MachineBasicBlock::livein_iterator I = MBB->livein_begin(); 129 I != MBB->livein_end(); ) { 135 I = MBB->removeLiveIn(I); 147 MachineBasicBlock *MBB = nullptr; // Current basic block member in struct:__anon2498::FPS 166 // Set up our stack model to match the incoming registers to MBB. 226 DebugLoc dl = I == MBB->end() ? DebugLoc() : I->getDebugLoc(); 241 BuildMI(*MBB, I, dl, TII->get(X86::XCH_F)).addReg(STReg); 247 DebugLoc dl = I == MBB->end() ? DebugLoc() : I->getDebugLoc(); 251 BuildMI(*MBB, [all...] |
H A D | X86LoadValueInjectionLoadHardening.cpp | 500 [&](MachineBasicBlock *MBB, GraphIter GI, unsigned ParentDepth) { 501 unsigned LoopDepth = MLI.getLoopDepth(MBB); 502 if (!MBB->empty()) { 504 auto NI = MBB->begin(); 507 if (!BlocksVisited.insert(MBB).second) 512 while (++NI != MBB->end()) { 521 auto T = MBB->getFirstTerminator(); 522 if (T != MBB->end()) { 529 for (MachineBasicBlock *Succ : MBB->successors()) 741 MachineBasicBlock *MBB; // Inser local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64DeadRegisterDefinitionsPass.cpp | 41 void processMachineBasicBlock(MachineBasicBlock &MBB); 117 MachineBasicBlock &MBB) { 118 const MachineFunction &MF = *MBB.getParent(); 119 for (MachineInstr &MI : MBB) { 196 for (auto &MBB : MF) 197 processMachineBasicBlock(MBB); 116 processMachineBasicBlock( MachineBasicBlock &MBB) argument
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H A D | AArch64SIMDInstrOpt.cpp | 425 MachineBasicBlock &MBB = *MI.getParent(); local 426 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); 446 BuildMI(MBB, MI, DL, *DupMCID, DupDest) 450 BuildMI(MBB, MI, DL, *MulMCID, MulDest) 458 BuildMI(MBB, MI, DL, *DupMCID, DupDest) 462 BuildMI(MBB, MI, DL, *MulMCID, MulDest) 508 MachineBasicBlock &MBB = *MI.getParent(); local 562 BuildMI(MBB, MI, DL, *ReplInstrMCID[0], ZipDest[0]) 565 BuildMI(MBB, MI, DL, *ReplInstrMCID[1], ZipDest[1]) 569 BuildMI(MBB, M [all...] |