/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsConstantIslandPass.cpp | 385 void computeBlockSize(MachineBasicBlock *MBB); 589 static bool BBHasFallthrough(MachineBasicBlock *MBB) { argument 591 MachineFunction::iterator MBBI = MBB->getIterator(); 593 if (std::next(MBBI) == MBB->getParent()->end()) 597 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(), 598 E = MBB->succ_end(); I != E; ++I) 653 for (MachineBasicBlock &MBB : *MF) { 654 // If this block doesn't fall through into the next MBB, then this is 656 if (!BBHasFallthrough(&MBB)) 657 WaterList.push_back(&MBB); 790 computeBlockSize(MachineBasicBlock *MBB) argument 802 MachineBasicBlock *MBB = MI->getParent(); local 1000 BBIsJumpedOver(MachineBasicBlock *MBB) argument 1505 MachineBasicBlock *MBB = MI->getParent(); local 1569 MachineBasicBlock *MBB = MI->getParent(); local [all...] |
H A D | MipsSERegisterInfo.cpp | 220 MachineBasicBlock &MBB = *MI.getParent(); local 224 MachineRegisterInfo &RegInfo = MBB.getParent()->getRegInfo(); 228 MBB.getParent()->getSubtarget().getInstrInfo()); 229 BuildMI(MBB, II, DL, TII.get(ABI.GetPtrAddiuOp()), Reg) 239 MachineBasicBlock &MBB = *MI.getParent(); local 244 MBB.getParent()->getSubtarget().getInstrInfo()); 245 unsigned Reg = TII.loadImmediate(Offset, MBB, II, DL, 247 BuildMI(MBB, II, DL, TII.get(ABI.GetPtrAdduOp()), Reg).addReg(FrameReg)
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ConditionalCompares.cpp | 181 /// Find the compare instruction in MBB that controls the conditional branch. 183 MachineInstr *findConvertibleCompare(MachineBasicBlock *MBB); 185 /// Return true if all non-terminator instructions in MBB can be safely 187 bool canSpeculateInstrs(MachineBasicBlock *MBB, const MachineInstr *CmpMI); 200 /// If the sub-CFG headed by MBB can be cmp-converted, initialize the 202 bool canConvert(MachineBasicBlock *MBB); 221 // PHI operands come in (VReg, MBB) pairs. 223 MachineBasicBlock *MBB = I.getOperand(oi + 1).getMBB(); local 225 if (MBB == Head) { 229 if (MBB 299 findConvertibleCompare(MachineBasicBlock *MBB) argument 382 canSpeculateInstrs(MachineBasicBlock *MBB, const MachineInstr *CmpMI) argument 438 canConvert(MachineBasicBlock *MBB) argument 915 tryConvert(MachineBasicBlock *MBB) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMConstantIslandPass.cpp | 248 bool BBHasFallthrough(MachineBasicBlock *MBB); 562 for (MachineBasicBlock &MBB : *MF) { 563 auto MI = MBB.getLastNonDebugInstr(); 564 if (MI == MBB.end()) 597 MF->insert(std::next(MachineFunction::iterator(MBB)), JumpTableBB); 607 LastCorrectlyNumberedBB = &MBB; 617 bool ARMConstantIslands::BBHasFallthrough(MachineBasicBlock *MBB) { argument 619 MachineFunction::iterator MBBI = MBB->getIterator(); 621 if (std::next(MBBI) == MBB->getParent()->end()) 625 if (!MBB 1087 BBIsJumpedOver(MachineBasicBlock *MBB) argument 1623 MachineBasicBlock *MBB = MI->getParent(); local 1666 MachineBasicBlock *MBB = MI->getParent(); local 1808 MachineBasicBlock *MBB = U.MI->getParent(); local 1937 MachineBasicBlock *MBB = Br.MI->getParent(); local 2110 MachineFunction::iterator MBB = JTMI->getParent()->getIterator(); local 2182 MachineBasicBlock *MBB = JTBBs[j]; local 2199 MachineBasicBlock *MBB = MI->getParent(); local 2376 MachineBasicBlock *MBB = JTBBs[j]; local [all...] |
H A D | ARMOptimizeBarriersPass.cpp | 62 for (auto &MBB : MF) { 66 for (auto &MI : MBB) {
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H A D | ARMInstrInfo.cpp | 118 MachineBasicBlock &MBB = *MI->getParent(); local 123 MIB = BuildMI(MBB, MI, DL, get(ARM::MOV_ga_pcrel_ldr), Reg) 128 MachineMemOperand *MMO = MBB.getParent()->getMachineMemOperand( 129 MachinePointerInfo::getGOT(*MBB.getParent()), Flags, 4, 4); 131 BuildMI(MBB, MI, DL, get(ARM::LDRi12), Reg)
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H A D | Thumb2InstrInfo.cpp | 60 MachineBasicBlock *MBB = Tail->getParent(); local 61 ARMFunctionInfo *AFI = MBB->getParent()->getInfo<ARMFunctionInfo>(); 81 MachineBasicBlock::iterator E = MBB->begin(); 109 Thumb2InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB, argument 113 if (MBBI == MBB.end()) 121 void Thumb2InstrInfo::copyPhysReg(MachineBasicBlock &MBB, argument 127 return ARMBaseInstrInfo::copyPhysReg(MBB, I, DL, DestReg, SrcReg, KillSrc); 129 BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg) 135 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, argument 140 if (I != MBB 178 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 230 emitT2RegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &dl, unsigned DestReg, unsigned BaseReg, int NumBytes, ARMCC::CondCodes Pred, unsigned PredReg, const ARMBaseInstrInfo &TII, unsigned MIFlags) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCMachineScheduler.cpp | 64 void PPCPostRASchedStrategy::enterMBB(MachineBasicBlock *MBB) { argument 66 PostGenericScheduler::enterMBB(MBB);
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H A D | PPCVSXCopy.cpp | 83 bool processBlock(MachineBasicBlock &MBB) { argument 86 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); 87 for (MachineInstr &MI : MBB) { 106 BuildMI(MBB, MI, MI.getDebugLoc(), 128 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(TargetOpcode::COPY),
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblySetP2AlignOperands.cpp | 85 for (auto &MBB : MF) { 86 for (auto &MI : MBB) {
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SwiftErrorValueTracking.h | 84 void setCurrentVReg(const MachineBasicBlock *MBB, const Value *, Register); 104 void preassignVRegs(MachineBasicBlock *MBB, BasicBlock::const_iterator Begin,
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H A D | TargetInstrInfo.h | 370 virtual void reMaterialize(MachineBasicBlock &MBB, 376 /// insert into \p MBB before \p InsertBefore. The target may update operands 380 virtual MachineInstr &duplicate(MachineBasicBlock &MBB, 558 /// Insert an unconditional indirect branch at the end of \p MBB to \p 563 virtual unsigned insertIndirectBranch(MachineBasicBlock &MBB, argument 571 /// Analyze the branching code at the end of MBB, returning 596 /// The CFG information in MBB.Predecessors and MBB.Successors must be valid 598 virtual bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, argument 633 /// Analyze the branching code at the end of MBB an 640 analyzeBranchPredicate(MachineBasicBlock &MBB, MachineBranchPredicate &MBP, bool AllowModify = false) const argument 651 removeBranch(MachineBasicBlock &MBB, int *BytesRemoved = nullptr) const argument 669 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded = nullptr) const argument 677 insertUnconditionalBranch(MachineBasicBlock &MBB, MachineBasicBlock *DestBB, const DebugLoc &DL, int *BytesAdded = nullptr) const argument 741 reduceLoopCount(MachineBasicBlock &MBB, MachineBasicBlock &PreHeader, MachineInstr *IndVar, MachineInstr &Cmp, SmallVectorImpl<MachineOperand> &Cond, SmallVectorImpl<MachineInstr *> &PrevInsts, unsigned Iter, unsigned MaxIter) const argument 758 isLegalToSplitMBBAt(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const argument 768 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, BranchProbability Probability) const argument 794 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, BranchProbability Probability) const argument 846 canInsertSelect(const MachineBasicBlock &MBB, ArrayRef<MachineOperand> Cond, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument 868 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, unsigned DstReg, ArrayRef<MachineOperand> Cond, unsigned TrueReg, unsigned FalseReg) const argument 931 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const argument 975 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 987 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 1313 replaceBranchWithTailCall(MachineBasicBlock &MBB, SmallVectorImpl<MachineOperand> &Cond, const MachineInstr &TailCall) const argument 1731 createPHIDestinationCopy( MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt, const DebugLoc &DL, Register Src, Register Dst) const argument 1741 createPHISourceCopy(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt, const DebugLoc &DL, Register Src, unsigned SrcSubReg, Register Dst) const argument 1767 isMBBSafeToOutlineFrom(MachineBasicBlock &MBB, unsigned &Flags) const argument 1773 buildOutlinedFrame(MachineBasicBlock &MBB, MachineFunction &MF, const outliner::OutlinedFunction &OF) const argument 1783 insertOutlinedCall(Module &M, MachineBasicBlock &MBB, MachineBasicBlock::iterator &It, MachineFunction &MF, const outliner::Candidate &C) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonAsmPrinter.h | 46 bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) 50 void HexagonProcessInstruction(MCInst &Inst, const MachineInstr &MBB);
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H A D | HexagonInstrInfo.cpp | 341 const MachineBasicBlock *MBB = MI.getParent(); local 343 for (++MII; MII != MBB->instr_end() && MII->isInsideBundle(); ++MII) 359 const MachineBasicBlock *MBB = MI.getParent(); local 361 for (++MII; MII != MBB->instr_end() && MII->isInsideBundle(); ++MII) 380 /// Cond[1] = MBB 385 bool HexagonInstrInfo::analyzeBranch(MachineBasicBlock &MBB, argument 395 MachineBasicBlock::instr_iterator I = MBB.instr_end(); 396 if (I == MBB.instr_begin()) 416 } while (I != MBB.instr_begin()); 418 I = MBB 555 removeBranch(MachineBasicBlock &MBB, int *BytesRemoved) const argument 578 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const argument 769 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, BranchProbability Probability) const argument 782 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumInstrs, BranchProbability Probability) const argument 787 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const argument 884 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 930 loadRegFromStackSlot( MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 984 MachineBasicBlock &MBB = *MI.getParent(); local 1437 MachineBasicBlock &MBB = *MI.getParent(); local 1539 insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const argument 1682 isSchedulingBoundary(const MachineInstr &MI, const MachineBasicBlock *MBB, const MachineFunction &MF) const argument 4307 const MachineBasicBlock &MBB = *MI.getParent(); local [all...] |
H A D | HexagonStoreWidening.cpp | 100 void createStoreGroups(MachineBasicBlock &MBB, 102 bool processBasicBlock(MachineBasicBlock &MBB); 209 void HexagonStoreWidening::createStoreGroups(MachineBasicBlock &MBB, argument 216 for (auto &I : MBB) 484 MachineBasicBlock *MBB = OG.back()->getParent(); local 485 MachineBasicBlock::iterator InsertAt = MBB->end(); 499 for (auto &I : *MBB) { 506 assert((InsertAt != MBB->end()) && "Cannot locate any store from the group"); 514 if (InsertAt != MBB->begin()) 525 InsertAt = MBB 568 processBasicBlock(MachineBasicBlock &MBB) argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRRegisterInfo.cpp | 135 MachineBasicBlock &MBB = *MI.getParent(); local 136 const MachineFunction &MF = *MBB.getParent(); 174 if (II != MBB.end()) 196 MachineInstr *New = BuildMI(MBB, II, dl, TII.get(Opcode), DstReg) 222 BuildMI(MBB, II, dl, TII.get(AVR::INRdA), AVR::R0).addImm(0x3f); 224 MachineInstr *New = BuildMI(MBB, II, dl, TII.get(AddOpc), AVR::R29R28) 230 BuildMI(MBB, std::next(II), dl, TII.get(AVR::OUTARr)) 236 BuildMI(MBB, std::next(II), dl, TII.get(SubOpc), AVR::R29R28)
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TailDuplicator.cpp | 104 MachineBasicBlock *MBB = &*I; local 105 SmallSetVector<MachineBasicBlock *, 8> Preds(MBB->pred_begin(), 106 MBB->pred_end()); 107 MachineBasicBlock::iterator MI = MBB->begin(); 108 while (MI != MBB->end()) { 121 dbgs() << "Malformed PHI in " << printMBBReference(*MBB) << ": " 132 dbgs() << "Warning: malformed PHI in " << printMBBReference(*MBB) 139 dbgs() << "Malformed PHI in " << printMBBReference(*MBB) << ": " 152 /// \p MBB - block to be duplicated 156 /// all Preds that received a copy of \p MBB 158 tailDuplicateAndUpdate( bool IsSimple, MachineBasicBlock *MBB, MachineBasicBlock *ForcedLayoutPred, SmallVectorImpl<MachineBasicBlock*> *DuplicatedPreds, function_ref<void(MachineBasicBlock *)> *RemovalCallback) argument 276 MachineBasicBlock *MBB = &*I++; local 985 appendCopies(MachineBasicBlock *MBB, SmallVectorImpl<std::pair<unsigned,RegSubRegPair>> &CopyInfos, SmallVectorImpl<MachineInstr*> &Copies) argument 999 removeDeadBlock( MachineBasicBlock *MBB, function_ref<void(MachineBasicBlock *)> *RemovalCallback) argument [all...] |
H A D | CFGuardLongjmp.cpp | 75 for (MachineBasicBlock &MBB : MF) { 76 for (MachineInstr &MI : MBB) {
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H A D | MachineBlockFrequencyInfo.cpp | 1 //===- MachineBlockFrequencyInfo.cpp - MBB Frequency Analysis -------------===// 228 MachineBlockFrequencyInfo::getBlockFreq(const MachineBasicBlock *MBB) const { 229 return MBFI ? MBFI->getBlockFreq(MBB) : 0; 233 const MachineBasicBlock *MBB) const { 235 return MBFI ? MBFI->getBlockProfileCount(F, MBB) : None; 245 MachineBlockFrequencyInfo::isIrrLoopHeader(const MachineBasicBlock *MBB) { argument 247 return MBFI->isIrrLoopHeader(MBB); 266 const MachineBasicBlock *MBB) const { 267 return MBFI ? MBFI->printBlockFreq(OS, MBB) : OS;
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H A D | DeadMachineInstructionElim.cpp | 119 for (MachineBasicBlock &MBB : make_range(MF.rbegin(), MF.rend())) { 126 for (MachineBasicBlock::succ_iterator S = MBB.succ_begin(), 127 E = MBB.succ_end(); S != E; S++) 133 for (MachineBasicBlock::reverse_iterator MII = MBB.rbegin(), 134 MIE = MBB.rend(); MII != MIE; ) {
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H A D | SplitKit.cpp | 77 const MachineBasicBlock &MBB) { 78 unsigned Num = MBB.getNumber(); 80 SlotIndex MBBEnd = LIS.getMBBEndIdx(&MBB); 83 for (const MachineBasicBlock *SMBB : MBB.successors()) 90 MachineBasicBlock::const_iterator FirstTerm = MBB.getFirstTerminator(); 91 if (FirstTerm == MBB.end()) 101 for (MachineBasicBlock::const_iterator I = MBB.end(), E = MBB.begin(); 121 // Find the value leaving MBB. 126 // If the value leaving MBB wa 76 computeLastInsertPoint(const LiveInterval &CurLI, const MachineBasicBlock &MBB) argument 139 getLastInsertPointIter(const LiveInterval &CurLI, MachineBasicBlock &MBB) argument 512 buildSingleSubRegCopy(unsigned FromReg, unsigned ToReg, MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex Def) argument 538 buildCopy(unsigned FromReg, unsigned ToReg, LaneBitmask LaneMask, MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, bool Late, unsigned RegIdx) argument 627 defFromParent(unsigned RegIdx, VNInfo *ParentVNI, SlotIndex UseIdx, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) argument 727 enterIntvAtEnd(MachineBasicBlock &MBB) argument 747 useIntv(const MachineBasicBlock &MBB) argument 808 leaveIntvAtTop(MachineBasicBlock &MBB) argument 858 MachineBasicBlock *MBB = MI->getParent(); local 891 findShallowDominator(MachineBasicBlock *MBB, MachineBasicBlock *DefMBB) argument 1174 MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start)->getIterator(); local 1459 MachineBasicBlock &MBB = *Indexes.getMBBFromIndex(VNI.def); local 1616 MachineBasicBlock *MBB = VRM.getMachineFunction().getBlockNumbered(MBBNum); local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | InstructionSelector.cpp | 40 MachineBasicBlock &MBB = *I.getParent(); local 41 MachineFunction &MF = *MBB.getParent();
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZLongBranch.cpp | 280 MachineBasicBlock *MBB = MF->getBlockNumbered(I); local 284 Block.Alignment = MBB->getAlignment(); 287 MachineBasicBlock::iterator MI = MBB->begin(); 288 MachineBasicBlock::iterator End = MBB->end(); 356 MachineBasicBlock *MBB = MI->getParent(); local 358 BuildMI(*MBB, MI, DL, TII->get(AddOpcode)) 362 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL)) 375 MachineBasicBlock *MBB = MI->getParent(); local 377 BuildMI(*MBB, MI, DL, TII->get(CompareOpcode)) 380 MachineInstr *BRCL = BuildMI(*MBB, M [all...] |
H A D | SystemZISelLowering.cpp | 6697 // Create a new basic block after MBB. 6698 static MachineBasicBlock *emitBlockAfter(MachineBasicBlock *MBB) { argument 6699 MachineFunction &MF = *MBB->getParent(); 6700 MachineBasicBlock *NewMBB = MF.CreateMachineBasicBlock(MBB->getBasicBlock()); 6701 MF.insert(std::next(MachineFunction::iterator(MBB)), NewMBB); 6705 // Split MBB after MI and return the new block (the one that contains 6708 MachineBasicBlock *MBB) { 6709 MachineBasicBlock *NewMBB = emitBlockAfter(MBB); 6710 NewMBB->splice(NewMBB->begin(), MBB, 6711 std::next(MachineBasicBlock::iterator(MI)), MBB 6707 splitBlockAfter(MachineBasicBlock::iterator MI, MachineBasicBlock *MBB) argument 6717 splitBlockBefore(MachineBasicBlock::iterator MI, MachineBasicBlock *MBB) argument 6746 checkCCKill(MachineInstr &MI, MachineBasicBlock *MBB) argument 6938 emitCondStore(MachineInstr &MI, MachineBasicBlock *MBB, unsigned StoreOpcode, unsigned STOCOpcode, bool Invert) const argument 7030 emitAtomicLoadBinary( MachineInstr &MI, MachineBasicBlock *MBB, unsigned BinOpcode, unsigned BitSize, bool Invert) const argument 7149 emitAtomicLoadMinMax( MachineInstr &MI, MachineBasicBlock *MBB, unsigned CompareOpcode, unsigned KeepOldMask, unsigned BitSize) const argument 7416 emitExt128(MachineInstr &MI, MachineBasicBlock *MBB, bool ClearEven) const argument 7447 emitMemMemWrapper( MachineInstr &MI, MachineBasicBlock *MBB, unsigned Opcode) const argument 7627 emitStringWrapper( MachineInstr &MI, MachineBasicBlock *MBB, unsigned Opcode) const argument 7686 emitTransactionBegin( MachineInstr &MI, MachineBasicBlock *MBB, unsigned Opcode, bool NoFloat) const argument 7734 emitLoadAndTestCmp0( MachineInstr &MI, MachineBasicBlock *MBB, unsigned Opcode) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | FastISel.cpp | 134 // Instructions are appended to FuncInfo.MBB. If the basic block already 138 if (!FuncInfo.MBB->empty()) 139 EmitStartPt = &FuncInfo.MBB->back(); 195 : FuncInfo.MBB->rend(); 228 static bool isTerminatingEHLabel(MachineBasicBlock *MBB, MachineInstr &MI) { argument 235 if (!MBB->isEHPad()) 240 return MI.getIterator() != MBB->getFirstNonPHI(); 247 MachineBasicBlock *MBB, MachineBasicBlock::iterator LastFlushPoint) { 249 for (MachineInstr &I : *MBB) { 251 (I.isTerminator() || isTerminatingEHLabel(MBB, 246 initialize( MachineBasicBlock *MBB, MachineBasicBlock::iterator LastFlushPoint) argument [all...] |