Searched refs:getImm (Results 101 - 125 of 179) sorted by relevance

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/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/
H A DMLxExpansionPass.cpp281 unsigned LaneImm = HasLane ? MI->getOperand(4).getImm() : 0;
283 ARMCC::CondCodes Pred = (ARMCC::CondCodes)MI->getOperand(NextOp).getImm();
/freebsd-10.2-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonNewValueJump.cpp229 int64_t v = MI->getOperand(2).getImm();
503 cmpOp2 = MI->getOperand(2).getImm();
/freebsd-10.2-release/contrib/llvm/lib/Target/R600/
H A DR600OptimizeVectorRegisters.cpp69 unsigned Chan = Instr->getOperand(i + 1).getImm();
253 unsigned Swizzle = MI.getOperand(i + Offset).getImm() + 1;
H A DR600Packetizer.cpp89 if (OperandIdx > -1 && BI->getOperand(OperandIdx).getImm() == 0)
352 (MI->getOpcode() == AMDGPU::CF_ALU && !MI->getOperand(8).getImm())) {
H A DR600EmitClauseMarkers.cpp244 if (TII->getFlagOp(I).getImm() & MO_FLAG_PUSH)
H A DSILowerControlFlow.cpp400 unsigned Off = MI.getOperand(4).getImm();
420 unsigned Off = MI.getOperand(4).getImm();
/freebsd-10.2-release/contrib/llvm/utils/TableGen/
H A DCodeGenInstruction.h319 int64_t getImm() const { assert(isImm()); return Imm; } function in struct:llvm::CodeGenInstAlias::ResultOperand
H A DFastISelEmitter.cpp88 static OpKind getImm(unsigned V) {
142 Result.Operands.push_back(OpKind::getImm(0));
182 Operands.push_back(OpKind::getImm(0));
222 Operands.push_back(OpKind::getImm(PredNo));
/freebsd-10.2-release/contrib/llvm/lib/CodeGen/
H A DExpandPostRAPseudos.cpp88 unsigned SubIdx = MI->getOperand(3).getImm();
H A DPrologEpilogInserter.cpp200 unsigned Size = I->getOperand(0).getImm();
206 unsigned ExtraInfo = I->getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
705 int Size = I->getOperand(0).getImm();
739 Offset.setImm(Offset.getImm() +
/freebsd-10.2-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp283 switch (Cond[0].getImm()) {
285 A64CC::CondCodes CC = static_cast<A64CC::CondCodes>(Cond[1].getImm());
329 MachineInstrBuilder MIB = BuildMI(&MBB, DL, get(Cond[0].getImm()));
336 MachineInstrBuilder MIB = BuildMI(&MBB, DL, get(Cond[0].getImm()));
/freebsd-10.2-release/contrib/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp128 Offset += MI.getOperand(FIOperandNum + 1).getImm();
/freebsd-10.2-release/contrib/llvm/lib/Target/Mips/
H A DMips16FrameLowering.cpp146 int64_t Amount = I->getOperand(0).getImm();
/freebsd-10.2-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCMCInstLower.cpp180 MCOp = MCOperand::CreateImm(MO.getImm());
H A DPPCRegisterInfo.cpp619 Offset += MI.getOperand(OffsetOperandNo).getImm();
748 Offset += MI->getOperand(OffsetOperandNo).getImm();
765 MI->getOperand(2).getImm() == 0)
829 Offset += MI.getOperand(OffsetOperandNo).getImm();
H A DPPCCodeEmitter.cpp287 return MO.getImm();
/freebsd-10.2-release/contrib/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp204 const MCExpr *getImm() const { function in class:__anon2607::SparcOperand
237 case k_Immediate: OS << "Imm: " << getImm() << "\n"; break;
254 const MCExpr *Expr = getImm();
370 const MCExpr *Imm = Op->getImm();
/freebsd-10.2-release/contrib/llvm/lib/Target/Sparc/
H A DSparcCodeEmitter.cpp176 return static_cast<unsigned>(MO.getImm());
H A DSparcRegisterInfo.cpp164 MI.getOperand(FIOperandNum + 1).getImm() +
H A DSparcAsmPrinter.cpp349 O << (int)MO.getImm();
388 MI->getOperand(opNum+1).getImm() == 0)
H A DSparcFrameLowering.cpp131 int Size = MI.getOperand(0).getImm();
/freebsd-10.2-release/contrib/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp142 Offset += MI.getOperand(FIOperandNum + 1).getImm();
/freebsd-10.2-release/contrib/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp2289 unsigned CCValid = MI->getOperand(3).getImm();
2290 unsigned CCMask = MI->getOperand(4).getImm();
2336 int64_t Disp = MI->getOperand(2).getImm();
2338 unsigned CCValid = MI->getOperand(4).getImm();
2339 unsigned CCMask = MI->getOperand(5).getImm();
2408 int64_t Disp = MI->getOperand(2).getImm();
2414 BitSize = MI->getOperand(6).getImm();
2530 int64_t Disp = MI->getOperand(2).getImm();
2536 BitSize = MI->getOperand(6).getImm();
2640 int64_t Disp = MI->getOperand(2).getImm();
[all...]
/freebsd-10.2-release/contrib/llvm/include/llvm/CodeGen/
H A DMachineInstr.h467 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
481 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
/freebsd-10.2-release/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCCodeEmitter.cpp259 return MO.getImm();

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