Searched refs:addLiveIn (Results 26 - 44 of 44) sorted by relevance

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/freebsd-10.2-release/contrib/llvm/lib/Target/R600/
H A DR600ISelLowering.cpp563 MRI.addLiveIn(Reg);
586 MRI.addLiveIn(RegisterI);
587 MRI.addLiveIn(RegisterJ);
1364 unsigned Reg = MF.addLiveIn(VA.getLocReg(), &AMDGPU::R600_Reg128RegClass);
H A DAMDGPUISelLowering.cpp795 MRI.addLiveIn(Reg, VirtualRegister);
/freebsd-10.2-release/contrib/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp751 // addLiveIn - This helper function adds the specified physical register to the
755 addLiveIn(MachineFunction &MF, unsigned PReg, const TargetRegisterClass *RC) function
758 MF.getRegInfo().addLiveIn(PReg, VReg);
1810 unsigned Reg = MF.addLiveIn(RA, getRegClassFor(VT));
2608 unsigned Reg = addLiveIn(DAG.getMachineFunction(), ArgReg, RC);
2633 unsigned Reg2 = addLiveIn(DAG.getMachineFunction(),
3466 unsigned VReg = addLiveIn(MF, ArgReg, RC);
3605 unsigned Reg = addLiveIn(MF, ArgRegs[I], RC);
/freebsd-10.2-release/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp376 MF.getRegInfo().addLiveIn(VA.getLocReg(), VRegHi);
391 unsigned loReg = MF.addLiveIn(NextVA.getLocReg(),
402 MF.getRegInfo().addLiveIn(VA.getLocReg(), VReg);
514 MF.getRegInfo().addLiveIn(*CurArgReg, VReg);
564 unsigned VReg = MF.addLiveIn(VA.getLocReg(),
635 unsigned VReg = MF.addLiveIn(SP::I0 + ArgOffset/8, &SP::I64RegsRegClass);
2501 unsigned RetReg = MF.addLiveIn(SP::I7,
/freebsd-10.2-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp873 RegInfo.addLiveIn(VA.getLocReg(), VReg);
878 RegInfo.addLiveIn(VA.getLocReg(), VReg);
996 unsigned Reg = MF.addLiveIn(TRI->getRARegister(), getRegClassFor(MVT::i32));
/freebsd-10.2-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp758 TrueBB->addLiveIn(AArch64::NZCV);
759 EndBB->addLiveIn(AArch64::NZCV);
1079 unsigned VReg = MF.addLiveIn(AArch64ArgRegs[i], &AArch64::GPR64RegClass);
1102 unsigned VReg = MF.addLiveIn(AArch64FPRArgRegs[i],
1171 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
2109 unsigned Reg = MF.addLiveIn(AArch64::X30, getRegClassFor(MVT::i64));
/freebsd-10.2-release/contrib/llvm/lib/CodeGen/
H A DPrologEpilogInserter.cpp335 EntryBlock->addLiveIn(CSI[i].getReg());
H A DTailDuplication.cpp798 PredBB->addLiveIn(*I);
H A DMachineLICM.cpp591 BB->addLiveIn(Reg);
/freebsd-10.2-release/contrib/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp685 MRI.addLiveIn(VA.getLocReg(), VReg);
735 unsigned VReg = MF.addLiveIn(SystemZ::ArgFPRs[I],
2936 MBB->addLiveIn(SystemZ::CC);
2998 DoneMBB->addLiveIn(SystemZ::CC);
/freebsd-10.2-release/contrib/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1148 RegInfo.addLiveIn(VA.getLocReg(), VReg);
1201 RegInfo.addLiveIn(ArgRegs[i], VReg);
/freebsd-10.2-release/contrib/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp469 RegInfo.addLiveIn(VA.getLocReg(), VReg);
/freebsd-10.2-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.cpp1223 MBB.addLiveIn(Reg);
/freebsd-10.2-release/contrib/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp515 MBB->addLiveIn(X86::ST0+i-1);
H A DX86ISelLowering.cpp2232 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
2373 unsigned VReg = MF.addLiveIn(GPR64ArgRegs[NumIntRegs],
2390 unsigned AL = MF.addLiveIn(X86::AL, &X86::GR8RegClass);
2400 unsigned VReg = MF.addLiveIn(XMMArgRegs64Bit[NumXMMRegs],
14136 sinkMBB->addLiveIn(X86::EAX);
14762 mainMBB->addLiveIn(X86::EFLAGS);
15327 copy0MBB->addLiveIn(X86::EFLAGS);
15328 sinkMBB->addLiveIn(X86::EFLAGS);
H A DX86FastISel.cpp1831 unsigned DstReg = FuncInfo.MF->addLiveIn(SrcReg, RC);
/freebsd-10.2-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp893 FuncInfo->ExceptionPointerVirtReg = MBB->addLiveIn(Reg, PtrRC);
897 FuncInfo->ExceptionSelectorVirtReg = MBB->addLiveIn(Reg, PtrRC);
/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp2765 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
2779 Reg = MF.addLiveIn(NextVA.getLocReg(), RC);
2910 unsigned VReg = MF.addLiveIn(GPRArgRegs[firstRegToSaveIndex], RC);
3037 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
3814 unsigned Reg = MF.addLiveIn(ARM::LR, getRegClassFor(MVT::i32));
H A DARMFastISel.cpp3123 unsigned DstReg = FuncInfo.MF->addLiveIn(SrcReg, RC);

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