/freebsd-10.2-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 2621 MachineBasicBlock *FBB = F->CreateMachineBasicBlock(LLVM_BB); local 2624 F->insert(It, FBB); 2634 BB->addSuccessor(FBB); 2636 FBB->addSuccessor(Sink); 2642 // Fill $FBB. 2644 BuildMI(*FBB, FBB->end(), DL, TII->get(Mips::ADDiu), VR2) 2646 BuildMI(*FBB, FBB->end(), DL, TII->get(Mips::B)).addMBB(Sink); 2656 .addReg(VR2).addMBB(FBB) 2686 MachineBasicBlock *FBB = F->CreateMachineBasicBlock(LLVM_BB); local [all...] |
/freebsd-10.2-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonInstrInfo.cpp | 120 MachineBasicBlock *FBB, 138 if (FBB == 0) { 166 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB); 174 MachineBasicBlock *&FBB, 178 FBB = NULL; 279 FBB = LastInst->getOperand(0).getMBB(); 298 FBB = LastInst->getOperand(0).getMBB(); 119 InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument 172 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument
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/freebsd-10.2-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 230 MachineBasicBlock *&FBB, 311 FBB = LastInst->getOperand(0).getMBB(); 325 FBB = LastInst->getOperand(0).getMBB(); 339 FBB = LastInst->getOperand(0).getMBB(); 393 MachineBasicBlock *FBB, 404 if (FBB == 0) { 425 BuildMI(&MBB, DL, get(PPC::B)).addMBB(FBB); 229 AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 392 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
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H A D | PPCFastISel.cpp | 685 MachineBasicBlock *FBB = FuncInfo.MBBMap[BI->getSuccessor(1)]; local 697 std::swap(TBB, FBB); 709 FastEmitBranch(FBB, DL); 716 MachineBasicBlock *Target = (Imm == 0) ? FBB : TBB;
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/freebsd-10.2-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.h | 610 MachineBasicBlock *FBB, MachineBasicBlock *CurBB, 613 MachineBasicBlock *FBB,
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H A D | SelectionDAGBuilder.cpp | 1393 MachineBasicBlock *FBB, 1420 BOp->getOperand(1), NULL, TBB, FBB, CurBB); 1428 NULL, TBB, FBB, CurBB); 1435 MachineBasicBlock *FBB, 1446 EmitBranchForMergedCondition(Cond, TBB, FBB, CurBB, SwitchBB); 1462 // jmp FBB 1469 FindMergedConditions(BOp->getOperand(1), TBB, FBB, TmpBB, SwitchBB, Opc); 1474 // jmp FBB 1477 // jmp FBB 1482 FindMergedConditions(BOp->getOperand(0), TmpBB, FBB, CurB [all...] |
/freebsd-10.2-release/contrib/llvm/include/llvm/Analysis/ |
H A D | ScalarEvolution.h | 445 /// branch of ExitCond, TBB, and FBB. 449 BasicBlock *FBB, 454 /// branch of the ICmpInst ExitCond, TBB, and FBB. 458 BasicBlock *FBB,
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/freebsd-10.2-release/contrib/llvm/lib/CodeGen/ |
H A D | IfConversion.cpp | 87 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its 223 MachineBasicBlock &FBB, 227 TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra, 821 // TBB FBB 840 // FBB 863 // FBB 963 MachineBasicBlock *TBB = NULL, *FBB = NULL; local 965 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond)) 966 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty()); 221 MeetIfcvtSizeLimit(MachineBasicBlock &TBB, unsigned TCycle, unsigned TExtra, MachineBasicBlock &FBB, unsigned FCycle, unsigned FExtra, const BranchProbability &Prediction) const argument
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H A D | MachineLICM.cpp | 804 MachineBasicBlock *TBB = 0, *FBB = 0; local 806 if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond, false) && Cond.empty())
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/freebsd-10.2-release/contrib/llvm/lib/Target/R600/ |
H A D | R600InstrInfo.cpp | 696 MachineBasicBlock *&FBB, 760 FBB = LastInst->getOperand(0).getMBB(); 795 MachineBasicBlock *FBB, 800 if (FBB == 0) { 828 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(FBB);
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/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1339 MachineBasicBlock *FBB = FuncInfo.MBBMap[BI->getSuccessor(1)]; local 1352 std::swap(TBB, FBB); 1368 FastEmitBranch(FBB, DL); 1385 std::swap(TBB, FBB); 1393 FastEmitBranch(FBB, DL); 1400 MachineBasicBlock *Target = (Imm == 0) ? FBB : TBB; 1422 std::swap(TBB, FBB); 1429 FastEmitBranch(FBB, DL);
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H A D | ARMBaseInstrInfo.cpp | 273 MachineBasicBlock *&FBB, 277 FBB = 0; 312 assert(!FBB && "FBB should have been null."); 313 FBB = TBB; 334 FBB = 0; 393 MachineBasicBlock *FBB, 408 if (FBB == 0) { 424 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB).addImm(ARMCC::AL).addReg(0); 426 BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB); 272 AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 392 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument [all...] |
H A D | ARMConstantIslandPass.cpp | 2016 MachineBasicBlock *TBB = 0, *FBB = 0; 2023 bool B = TII->AnalyzeBranch(*BB, TBB, FBB, Cond); 2029 !TII->AnalyzeBranch(*OldPrior, TBB, FBB, CondPrior)) {
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/freebsd-10.2-release/contrib/llvm/lib/Analysis/ |
H A D | ScalarEvolution.cpp | 4436 /// were a conditional branch of ExitCond, TBB, and FBB. 4446 BasicBlock *FBB, 4453 ExitLimit EL0 = ComputeExitLimitFromCond(L, BO->getOperand(0), TBB, FBB, 4455 ExitLimit EL1 = ComputeExitLimitFromCond(L, BO->getOperand(1), TBB, FBB, 4476 assert(L->contains(FBB) && "Loop block has no successor in loop!"); 4487 bool EitherMayExit = L->contains(FBB); 4488 ExitLimit EL0 = ComputeExitLimitFromCond(L, BO->getOperand(0), TBB, FBB, 4490 ExitLimit EL1 = ComputeExitLimitFromCond(L, BO->getOperand(1), TBB, FBB, 4525 return ComputeExitLimitFromICmp(L, ExitCondICmp, TBB, FBB, IsSubExpr); 4532 if (L->contains(FBB) [all...] |
/freebsd-10.2-release/contrib/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 2709 MachineBasicBlock *&FBB, 2745 FBB = 0; 2806 FBB = TBB; 2873 MachineBasicBlock *FBB, 2883 assert(!FBB && "Unconditional branch with multiple successors!"); 2912 if (FBB) { 2914 BuildMI(&MBB, DL, get(X86::JMP_4)).addMBB(FBB); 2707 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 2872 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument
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