/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.h | 43 Hi, Lo, // Hi/Lo operations, typically on a global address. enumerator in enum:llvm::HexagonISD::__anon2398
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H A D | HexagonISelLowering.cpp | 1484 case HexagonISD::Hi: return "HexagonISD::Hi";
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/freebsd-10.0-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.h | 36 Hi, Lo, // Hi/Lo operations, typically on a global address. enumerator in enum:llvm::SPISD::__anon2495
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H A D | SparcISelLowering.cpp | 778 SDValue Hi = DAG.getLoad(MVT::i32, dl, Store, StackPtr, local 788 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Hi)); 809 MemOpChains.push_back(DAG.getStore(Chain, dl, Hi, PtrOff, 1380 case SPISD::Hi: return "SPISD::Hi"; 1471 SDValue Hi = DAG.getNode(SPISD::Hi, DL, VT, withTargetFlags(Op, HiTF, DAG)); local 1473 return DAG.getNode(ISD::ADD, DL, VT, Hi, Lo); 1509 SDValue Hi = makeHiLoPair(Op, SPII::MO_HH, SPII::MO_HM, DAG); local 1510 Hi [all...] |
/freebsd-10.0-release/contrib/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DIE.h | 302 DIEDelta(const MCSymbol *Hi, const MCSymbol *Lo) argument 303 : DIEValue(isDelta), LabelHi(Hi), LabelLo(Lo) {}
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H A D | DwarfCompileUnit.h | 238 const MCSymbol *Hi, const MCSymbol *Lo);
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H A D | AsmPrinter.cpp | 1345 /// EmitLabelDifference - Emit something like ".long Hi-Lo" where the size 1346 /// in bytes of the directive is specified by Size and Hi/Lo specify the 1348 void AsmPrinter::EmitLabelDifference(const MCSymbol *Hi, const MCSymbol *Lo, argument 1350 // Get the Hi-Lo expression. 1352 MCBinaryExpr::CreateSub(MCSymbolRefExpr::Create(Hi, OutContext), 1367 /// EmitLabelOffsetDifference - Emit something like ".long Hi+Offset-Lo" 1368 /// where the size in bytes of the directive is specified by Size and Hi/Lo 1370 void AsmPrinter::EmitLabelOffsetDifference(const MCSymbol *Hi, uint64_t Offset, argument 1374 // Emit Hi+Offset - Lo 1375 // Get the Hi [all...] |
H A D | DwarfCompileUnit.cpp | 212 const MCSymbol *Hi, const MCSymbol *Lo) { 213 DIEValue *Value = new (DIEValueAllocator) DIEDelta(Hi, Lo); 211 addDelta(DIE *Die, unsigned Attribute, unsigned Form, const MCSymbol *Hi, const MCSymbol *Lo) argument
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/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 450 SDValue Lo, Hi, ShAmt; local 465 Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt); 466 Hi = DAG.getNode(ISD::AND, dl, WideVT, Hi, SrcEltBitMask); 470 if (Hi.getNode()) 471 Lo = DAG.getNode(ISD::OR, dl, WideVT, Lo, Hi);
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H A D | LegalizeDAG.cpp | 400 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); local 404 Store1 = DAG.getTruncStore(Chain, dl, TLI.isLittleEndian()?Lo:Hi, Ptr, 410 Store2 = DAG.getTruncStore(Chain, dl, TLI.isLittleEndian()?Hi:Lo, Ptr, 531 SDValue Lo, Hi; local 538 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, 543 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, LD->getPointerInfo(), 556 TLI.getShiftAmountTy(Hi.getValueType())); 557 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount); 561 Hi.getValue(1)); 680 SDValue Hi local [all...] |
H A D | SelectionDAGBuilder.cpp | 124 SDValue Lo, Hi; local 131 Hi = getCopyFromParts(DAG, DL, Parts + RoundParts / 2, 135 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); 139 std::swap(Lo, Hi); 141 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi); 147 Hi = getCopyFromParts(DAG, DL, 153 std::swap(Lo, Hi); 155 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi); 156 Hi 166 SDValue Lo, Hi; local [all...] |
H A D | DAGCombiner.cpp | 2201 SDValue Hi = DAG.getNode(HiOp, N->getDebugLoc(), N->getValueType(1), local 2203 AddToWorkList(Hi.getNode()); 2204 SDValue HiOpt = combine(Hi.getNode()); 2205 if (HiOpt.getNode() && HiOpt != Hi && 2229 SDValue Hi = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(1)); local 2230 Lo = DAG.getNode(ISD::MUL, DL, NewVT, Lo, Hi); 2232 Hi = DAG.getNode(ISD::SRL, DL, NewVT, Lo, 2234 Hi = DAG.getNode(ISD::TRUNCATE, DL, VT, Hi); 2237 return CombineTo(N, Lo, Hi); 2259 SDValue Hi = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N->getOperand(1)); local 8393 SDValue Hi = DAG.getConstant(Val >> 32, MVT::i32); local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 151 // Hi0: initial value of Hi register 227 // Hi0: initial value of Hi register 506 SDValue Lo, Hi; local 512 Hi = DAG.getNode(MipsISD::ExtractLOHI, DL, Ty, Mult, 516 return HasLo ? Lo : Hi; 518 SDValue Vals[] = { Lo, Hi }; 534 SDValue Hi = DAG.getNode(MipsISD::ExtractLOHI, DL, MVT::i32, Op, local 536 return DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Lo, Hi);
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H A D | MipsISelLowering.cpp | 100 SDValue Hi = getTargetNode(Op, DAG, MipsII::MO_ABS_HI); local 103 DAG.getNode(MipsISD::Hi, DL, Ty, Hi), 137 SDValue Hi = DAG.getNode(MipsISD::Hi, DL, Ty, getTargetNode(Op, DAG, HiFlag)); local 138 Hi = DAG.getNode(ISD::ADD, DL, Ty, Hi, getGlobalReg(DAG, Ty)); 139 SDValue Wrapper = DAG.getNode(MipsISD::Wrapper, DL, Ty, Hi, 149 case MipsISD::Hi: return "MipsISD::Hi"; 1530 SDValue Hi = DAG.getNode(MipsISD::Hi, DL, PtrVT, TGAHi); local 1555 SDValue Hi = DAG.getNode(MipsISD::Hi, DL, PtrVT, TGAHi); local 1838 SDValue Lo = Op.getOperand(0), Hi = Op.getOperand(1); local 1869 SDValue Lo = Op.getOperand(0), Hi = Op.getOperand(1); local 2332 SDValue Hi = DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, local [all...] |
H A D | MipsLongBranch.cpp | 264 int64_t Hi = SignExtend64<16>(((Offset + 0x8000) >> 16) & 0xffff); local 290 .append(BuildMI(*MF, DL, TII->get(Mips::LUi), Mips::AT).addImm(Hi)); 341 .addReg(Mips::AT_64).addImm(Hi);
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H A D | MipsSEFrameLowering.cpp | 160 unsigned Hi = RegInfo.getSubReg(Dst, Mips::sub_hi); local 167 BuildMI(MBB, I, DL, Desc, Hi).addReg(VR1, RegState::Kill); 185 unsigned Hi = RegInfo.getSubReg(Src, Mips::sub_hi); local 190 BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), VR1).addReg(Hi, SrcKill);
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H A D | MipsISelLowering.h | 40 // No relation with Mips Hi register 41 Hi, enumerator in enum:llvm::MipsISD::NodeType
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/freebsd-10.0-release/contrib/llvm/tools/clang/lib/Sema/ |
H A D | SemaStmt.cpp | 881 Expr *Hi = CR->getRHS(); local 888 CheckConvertedConstantExpression(Hi, CondType, HiVal, 894 Hi = ConvHi.take(); 896 HiVal = Hi->EvaluateKnownConstInt(Context); 900 Hi = DefaultLvalueConversion(Hi).take(); 901 Hi = ImpCastExprToType(Hi, CondType, CK_IntegralCast).take(); 906 Hi->getLocStart(), 909 CR->setRHS(Hi); 1036 llvm::APSInt Hi = local 1064 llvm::APSInt Hi = local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 937 unsigned Hi = (Imm >> 16) & 0xFFFF; local 944 // Handle the Hi bits. 945 unsigned OpC = Hi ? PPC::LIS8 : PPC::LI8; 946 Result = CurDAG->getMachineNode(OpC, dl, MVT::i64, getI32Imm(Hi)); 951 // Just the Hi bits. 952 Result = CurDAG->getMachineNode(PPC::LIS8, dl, MVT::i64, getI32Imm(Hi)); 967 if ((Hi = (Remainder >> 16) & 0xFFFF)) { 969 SDValue(Result, 0), getI32Imm(Hi));
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H A D | PPCISelLowering.h | 64 /// Hi/Lo - These represent the high and low 16-bit parts of a global 69 Hi, Lo, enumerator in enum:llvm::PPCISD::NodeType
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H A D | PPCISelLowering.cpp | 619 case PPCISD::Hi: return "PPCISD::Hi"; 1360 SDValue Hi = DAG.getNode(PPCISD::Hi, DL, PtrVT, HiPart, Zero); local 1365 Hi = DAG.getNode(ISD::ADD, DL, PtrVT, 1366 DAG.getNode(PPCISD::GlobalBaseReg, DL, PtrVT), Hi); 1370 return DAG.getNode(ISD::ADD, DL, PtrVT, Hi, Lo); 1446 SDValue Hi = DAG.getNode(PPCISD::Hi, dl, PtrVT, TGAHi, TLSReg); local 1447 return DAG.getNode(PPCISD::Lo, dl, PtrVT, TGALo, Hi); 5038 SDValue Hi = Op.getOperand(1); local 5067 SDValue Hi = Op.getOperand(1); local 5095 SDValue Hi = Op.getOperand(1); local 5810 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAndOrXor.cpp | 269 /// Emit a computation of: (V >= Lo && V < Hi) if Inside is true, otherwise 270 /// (V < Lo || V >= Hi). In practice, we emit the more efficient 271 /// (V-Lo) \<u Hi-Lo. This method expects that Lo <= Hi. isSigned indicates 274 Value *InstCombiner::InsertRangeTest(Value *V, Constant *Lo, Constant *Hi, argument 277 ICmpInst::ICMP_SLE:ICmpInst::ICMP_ULE), Lo, Hi))->getZExtValue() && 278 "Lo is not <= Hi in range emission code!"); 281 if (Lo == Hi) // Trivially false. 284 // V >= Min && V < Hi --> V < Hi [all...] |
H A D | InstCombine.h | 370 Value *InsertRangeTest(Value *V, Constant *Lo, Constant *Hi,
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/freebsd-10.0-release/crypto/openssl/crypto/modes/ |
H A D | gcm128.c | 137 u128 *Hi = Htable+i, H0 = *Hi; local 139 Hi[j].hi = H0.hi^Htable[j].hi; 140 Hi[j].lo = H0.lo^Htable[j].lo; 275 u128 *Hi = Htable+i; local 277 for (V=*Hi, j=1; j<i; ++j) { 278 Hi[j].hi = V.hi^Htable[j].hi; 279 Hi[j].lo = V.lo^Htable[j].lo;
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/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 1269 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, local 1271 Chain = Hi.getValue(1); 1272 InFlag = Hi.getValue(2); 1273 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); 1285 Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag); 1286 Chain = Hi.getValue(1); 1287 InFlag = Hi.getValue(2); 1288 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); 3493 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); local 3494 Hi 3598 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, local 3658 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); local 3693 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, Tmp3, ARMcc, local 3896 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), local [all...] |