/freebsd-10-stable/sys/gnu/dts/arm/ |
H A D | imx25-pdk.dts | 216 MATRIX_KEY(0x0, 0x2, KEY_VOLUMEDOWN) 220 MATRIX_KEY(0x1, 0x2, KEY_ENTER) 222 MATRIX_KEY(0x2, 0x0, KEY_F6) 223 MATRIX_KEY(0x2, 0x1, KEY_F8) 224 MATRIX_KEY(0x2, 0x2, KEY_F9) 225 MATRIX_KEY(0x2, 0x3, KEY_F10) 228 MATRIX_KEY(0x3, 0x2, KEY_F3) 229 MATRIX_KEY(0x3, 0x2, KEY_POWER)
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H A D | imx6sx-pinfunc.h | 19 #define MX6SX_PAD_GPIO1_IO00__SPDIF_LOCK 0x0014 0x035C 0x0000 0x2 0x0 27 #define MX6SX_PAD_GPIO1_IO01__SPDIF_SR_CLK 0x0018 0x0360 0x0000 0x2 0x0 35 #define MX6SX_PAD_GPIO1_IO02__CSI2_MCLK 0x001C 0x0364 0x0000 0x2 0x0 43 #define MX6SX_PAD_GPIO1_IO03__ENET1_REF_CLK_25M 0x0020 0x0368 0x0000 0x2 0x0 52 #define MX6SX_PAD_GPIO1_IO04__ENET1_MDC 0x0024 0x036C 0x0000 0x2 0x0 61 #define MX6SX_PAD_GPIO1_IO05__ENET1_MDIO 0x0028 0x0370 0x0764 0x2 0x0 70 #define MX6SX_PAD_GPIO1_IO06__ENET2_MDC 0x002C 0x0374 0x0000 0x2 0x0 79 #define MX6SX_PAD_GPIO1_IO07__ENET2_MDIO 0x0030 0x0378 0x0770 0x2 0x0 88 #define MX6SX_PAD_GPIO1_IO08__SDMA_EXT_EVENT_0 0x0034 0x037C 0x081C 0x2 0x0 97 #define MX6SX_PAD_GPIO1_IO09__SDMA_EXT_EVENT_1 0x0038 0x0380 0x0820 0x2 [all...] |
H A D | imx50-pinfunc.h | 19 #define MX50_PAD_KEY_COL0__EIM_NANDF_CLE 0x020 0x2cc 0x000 0x2 0x0 24 #define MX50_PAD_KEY_ROW0__EIM_NANDF_ALE 0x024 0x2d0 0x000 0x2 0x0 29 #define MX50_PAD_KEY_COL1__EIM_NANDF_CEN_0 0x028 0x2d4 0x000 0x2 0x0 34 #define MX50_PAD_KEY_ROW1__EIM_NANDF_CEN_1 0x02c 0x2d8 0x000 0x2 0x0 39 #define MX50_PAD_KEY_COL2__EIM_NANDF_CEN_2 0x030 0x2dc 0x000 0x2 0x0 44 #define MX50_PAD_KEY_ROW2__EIM_NANDF_CEN_3 0x034 0x2e0 0x000 0x2 0x0 49 #define MX50_PAD_KEY_COL3__EIM_NANDF_READY0 0x038 0x2e4 0x7b4 0x2 0x0 54 #define MX50_PAD_KEY_ROW3__EIM_NANDF_DQS 0x03c 0x2e8 0x7b0 0x2 0x0 59 #define MX50_PAD_I2C1_SCL__UART2_TXD_MUX 0x040 0x2ec 0x7cc 0x2 0x0 62 #define MX50_PAD_I2C1_SDA__UART2_RXD_MUX 0x044 0x2f0 0x7cc 0x2 [all...] |
/freebsd-10-stable/crypto/openssl/crypto/rc2/ |
H A D | rc2_locl.h | 148 t=(x0+(x1& ~x3)+(x2&x3)+ *(p0++))&0xffff; \ 150 t=(x1+(x2& ~x0)+(x3&x0)+ *(p0++))&0xffff; \ 152 t=(x2+(x3& ~x1)+(x0&x1)+ *(p0++))&0xffff; \ 153 x2=(t<<3)|(t>>13); \ 154 t=(x3+(x0& ~x2)+(x1&x2)+ *(p0++))&0xffff; \
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/freebsd-10-stable/sys/arm/ti/ |
H A D | ti_sdma.h | 48 #define TI_SDMA_BURST_32 0x2 53 #define TI_SDMA_DATA_32BITS_SCALAR 0x2 57 #define TI_SDMA_ADDR_SINGLE_INDEX 0x2
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/freebsd-10-stable/sys/isa/ |
H A D | pnpreg.h | 170 #define PNP_MEM_CONTROL_16BIT 0x2 229 #define PNP_TAG_LOGICAL_DEVICE 0x2 243 #define PNP_TAG_ID_ANSI 0x2
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/freebsd-10-stable/contrib/apr/include/ |
H A D | apr_thread_mutex.h | 45 #define APR_THREAD_MUTEX_UNNESTED 0x2 /**< disable nested locks */
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/freebsd-10-stable/contrib/binutils/include/opcode/ |
H A D | s390.h | 114 #define S390_OPERAND_FPR 0x2
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/freebsd-10-stable/include/ |
H A D | wordexp.h | 52 #define WRDE_DOOFFS 0x2 /* we_offs member is valid */
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/freebsd-10-stable/sys/cam/scsi/ |
H A D | scsi_iu.h | 12 #define SIU_SNSVALID 0x2
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/freebsd-10-stable/sys/contrib/octeon-sdk/ |
H A D | cvmx-helper-board.h | 78 set_phy_link_flags_flow_control_disable = 0x2 << 1,
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H A D | cvmx-rtc.h | 69 CVMX_RTC_WRITE = 0x2, /**< Device supports write access */
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/freebsd-10-stable/sys/dev/nand/ |
H A D | nandsim_swap.h | 40 #define BLOCK_SWAPPED 0x2
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/freebsd-10-stable/sys/fs/nfs/ |
H A D | nfscl.h | 67 #define NFSSATTR_SIZE0 0x2
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/freebsd-10-stable/sys/mips/atheros/ |
H A D | pcf2123reg.h | 38 #define PCF2123_REG_SECONDS 0x2
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/freebsd-10-stable/sys/sys/ |
H A D | statvfs.h | 75 #define ST_NOSUID 0x2
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/freebsd-10-stable/usr.sbin/bhyve/ |
H A D | mem.h | 49 #define MEM_F_WRITE 0x2
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/freebsd-10-stable/contrib/ntp/lib/isc/include/isc/ |
H A D | fsaccess.h | 140 #define ISC_FSACCESS_GROUP 0x2 /*%< Primary group owner. */
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/freebsd-10-stable/bin/sh/ |
H A D | parser.h | 57 #define VSMINUS 0x2 /* ${var-text} */
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/freebsd-10-stable/contrib/ntp/ntpdc/ |
H A D | ntpdc.h | 23 #define NTP_UINT 0x2 /* unsigned integer */
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/freebsd-10-stable/sys/boot/fdt/dts/powerpc/ |
H A D | mpc8555cds.dts | 113 0x2 0x0 0xf8000000 0x00008000>; 137 reg = <0x2 0x0 0x00008000>; 356 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 357 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 362 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 363 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 368 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 369 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 374 0x9800 0x0 0x0 0x2 &mpic 0x2 [all...] |
/freebsd-10-stable/sys/dev/vxge/vxgehal/ |
H A D | vxgehal-regs.h | 608 #define VXGE_HAL_PCI_EXP_LNKCAP_LS_5 0x2 /* 5 and 2.5 Gb/s supported. */ 612 #define VXGE_HAL_PCI_EXP_LNKCAP_LW_X2 0x2 /* Reserved. */ 621 #define VXGE_HAL_PCI_EXP_LNKCAP_LASPM_RES2 0x2 /* Reserved. */ 626 #define VXGE_HAL_PCI_EXP_LNKCAP_L0_128_256 0x2 /* 128ns to less than 256ns. */ 635 #define VXGE_HAL_PCI_EXP_LNKCAP_L1_2us_4us 0x2 /* 2us to less than 4us. */ 650 #define VXGE_HAL_PCI_EXP_LNKCTL_ASPM_L1_EN 0x2 /* L1 entry enabled. */ 666 #define VXGE_HAL_PCI_EXP_LNKSTA_LS_5 0x2 /* 5 2.5 Gb/s supported. */ 670 #define VXGE_HAL_PCI_EXP_LNKSTA_LW_X2 0x2 /* Reserved. */ 683 #define VXGE_HAL_PCI_EXP_STLCAP_PWR_CTRL 0x2 /* Power Control Present */ 696 #define VXGE_HAL_PCI_EXP_STLCAP_SL_PWR_XBY100 0x2 /* 0.0 [all...] |
/freebsd-10-stable/lib/msun/ld80/ |
H A D | s_expl.c | 164 long double x_lo, x2, z; local 203 x2 = x * x; 204 x4 = x2 * x2; 205 q = x4 * (x2 * (x4 * 211 (x2 * B12 + (x * B11 + B10)) + 212 (x2 * (x * B9 + B8) + (x * B7 + B6))) + 213 (x * B5 + B4.e)) + x2 * x * B3.e;
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/freebsd-10-stable/sys/arm/xscale/ixp425/ |
H A D | ixp425_pci_asm.S | 66 eor r1, r1, #0x2 97 eor r1, r1, #0x2
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/freebsd-10-stable/sys/dev/ic/ |
H A D | via6522reg.h | 56 #define ACR_SRI_PHI2 0x2 /* " " " " " PHI2 */ 73 #define PCR_CNTL_PEDGE 0x2 /* Input - positive active edge */
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