/barrelfish-master/usr/eclipseclp/Kernel/lib/ |
H A D | cgi.pl | 65 user, e.g. by embedding it into the generated html page.
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H A D | http_server.pl | 308 where the HTML page resides.
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/barrelfish-master/doc/022-armv8/ |
H A D | report.tex | 426 User-level page tables will \textbf{initially} be limited to a 4k translation 427 granularity. \textbf{Eventually} user-level page tables \textbf{should} have 428 access to all page-table formats and page sizes, as is the case in the current 621 \item Allocates and builds the CPU driver's page tables. 622 \item Activates the initial page table, and allocates a stack. 639 available for free, e.g. for the initial page tables. By moving ELF loading 643 code to relocate them, and to construct their page tables. 672 ELF images are loaded into page-aligned regions of type 675 initialises the inital page table [all...] |
/barrelfish-master/lib/devif/backends/net/mlx4/drivers/infiniband/hw/mthca/ |
H A D | mthca_dev.h | 189 void **page; member in struct:mthca_array::__anon683 233 struct page *icm_page;
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/barrelfish-master/lib/openssl-1.0.0d/crypto/sha/asm/ |
H A D | sha1-ppc.pl | 10 # I let hardware handle unaligned input(*), except on page boundaries 220 # upon unaligned access which crosses page boundary. "Better safe 229 andi. $t1,$t1,4095 ; distance to closest page boundary 233 ble- Laligned ; didn't cross the page boundary
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H A D | sha512-ppc.pl | 10 # I let hardware handle unaligned input, except on page boundaries 257 # upon unaligned access which crosses page boundary. "Better safe 266 andi. $t1,$t1,`4096-16*$SZ` ; distance to closest page boundary 269 ble- Laligned ; didn't cross the page boundary
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/barrelfish-master/lib/devif/backends/net/mlx4/drivers/net/mlx4/ |
H A D | en_tx.c | 38 #include <linux/page.h>
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/barrelfish-master/kernel/ |
H A D | paging_generic.c | 105 // we can currently only handle page tables with less than 2^16 entries. 118 * in page table 'ptable' 131 // compile_vaddr can be used on arbitrary page table types) 172 // add next piece of virtual address until we are at root page table 185 // no next page table 310 // calculate page table address 314 // get virtual address of first page 321 debug(SUBSYS_PAGING, "unmapping in floating page table; not flushing TLB\n"); 352 // TODO: cleanup arch compatibility mess for page size selection 403 panic("large page suppor [all...] |
/barrelfish-master/usr/eclipseclp/Contrib/ |
H A D | struct.pl | 106 % for tidy_withvars. The new version of tidy uses copy_ground (next page).
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/barrelfish-master/doc/015-disk-driver-arch/ |
H A D | design.tex | 28 page as the \ac{hba} memory, clients are able to access not just their own
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/barrelfish-master/usr/eclipseclp/documents/megalog/ |
H A D | multiuser-sec.tex | 187 user between relation level and page level locking (see Knowledge Base BIP 275 A {\em shadow page} technique is used by \eclipse to implement the
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/barrelfish-master/usr/eclipseclp/documents/userman/ |
H A D | umsintro.tex | 290 %%consult page \pageref{cnpage} how to load the appropriate library.}. 347 %Calling {\tt help(PredSpec)} will display the appropriate manual page,
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H A D | umsflags.tex | 41 % Copy here the text from the get_flag/2 bip book page, remove
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H A D | umssyntax.tex | 518 page \pageref{chapopers}). They may be locally redefined if desired.
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/barrelfish-master/usr/skb/programs/ |
H A D | bridge_page_orig_naturally_aligned.pl | 52 % according to the spec we need 64Bytes in the Intel case. Reserve a page
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H A D | bridge_page.pl | 120 % according to the spec we need 64Bytes in the Intel case. Reserve a page
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H A D | decoding_net2.pl | 1224 % node_pt stores the root page table for per node
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H A D | decoding_net3.pl | 1550 % node_pt stores the root page table for per node
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H A D | decoding_net3_multid.pl | 1569 % node_pt stores the root page table for per node
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/barrelfish-master/lib/devif/backends/net/mlx4/include/linux/ |
H A D | linux_compat.c | 706 vmap(struct page **pages, unsigned int count, unsigned long flags, int prot)
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/barrelfish-master/usr/eclipseclp/documents/visualisation/ |
H A D | annotate.tex | 357 clients \texttt{A,B,C,D} taken from the {\eclipse} examples web page.
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/barrelfish-master/doc/026-device-queues/ |
H A D | devif.tex | 72 nobreak=true% prevent page breaks in the middle of mystyle 750 entries represents a 4k page that can be used as buffers. \textbf{Note: the number
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/barrelfish-master/include/vm/ |
H A D | vm_page.c | 66 * - A page queue lock is required when adding or removing a page from a 67 * page queue regardless of other locks or the busy state of a page. 69 * * In general, no thread besides the page daemon can acquire or 70 * hold more than one page queue lock at a time. 72 * * The page daemon can acquire and hold any pair of page queue 125 * Associated with page of user-allocatable memory is a 126 * page structur [all...] |
/barrelfish-master/doc/019-device-drivers/ |
H A D | DeviceDriver.tex | 495 you a way to have fine grained, page level access control on memory. In
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/barrelfish-master/usr/eclipseclp/documents/intro_paper/ |
H A D | eclipse.tex | 466 home page (whose URL is given in section \ref{icparcurl} below). 2378 IC-Parc home page 2599 reachable from the IC-Parc home page at
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