Searched refs:base (Results 101 - 125 of 513) sorted by relevance

1234567891011>>

/barrelfish-master/kernel/include/arch/x86_32/
H A Dx86.h65 static inline void monitor(lvaddr_t base, uint32_t extensions, uint32_t hints) argument
70 "a" (base),
/barrelfish-master/kernel/include/arch/x86_64/
H A Dpaging_kernel_arch.h48 * Assigns given physical base address to the CR3 register,
52 * \param addr Physical base address of page table.
59 static lvaddr_t inline paging_map_device(lpaddr_t base, size_t size) argument
61 return paging_x86_64_map_device(base, size);
/barrelfish-master/lib/libc/locale/
H A Dnextwctype.c47 _RuneEntry *base, *re; local
66 base = rr->__ranges;
68 re = base + (lim >> 1);
72 base = re + 1;
/barrelfish-master/include/
H A Dftw.h52 int base; member in struct:FTW
H A Dgrubmenu.h13 uint64_t base; member in struct:menu_mmap_entry
/barrelfish-master/lib/dma/
H A Ddma_mem_utils.c48 uint64_t base, limit; local
49 ram_get_affinity(&base, &limit);
55 ram_set_affinity(base, limit);
64 mem->devaddr = id.base;
/barrelfish-master/usr/tests/nested_paging_test/
H A Dmain.c47 genvaddr_t base; local
50 err = install_user_managed_pdpt(&base, &ptable);
64 paging_x86_64_map_huge(&pdpt[i], fi.base + i*HUGE_PAGE_SIZE,
70 uint8_t *buf = (uint8_t *)base;
H A Dnestedpaging.c14 errval_t install_user_managed_pdpt(genvaddr_t *base, void **ptable) argument
17 assert(base);
29 printf("base: %"PRIxGENVADDR"\n", base_);
32 ours.base = base_;
36 *base = base_;
/barrelfish-master/usr/monitor/
H A Ddomain.c25 static errval_t reclaim_memory(genpaddr_t base, uint8_t bits) argument
37 .base = base,
58 err = b->rpc_tx_vtbl.free_monitor(b, ramcap, base, bits, &result);
106 /* printf("%s.%d: RAM cap deleted, base = %" PRIxGENPADDR ", bits = %u\n", */
107 /* disp_name(), disp_get_core_id(), ram->base, ram->bits); */
109 err = reclaim_memory(u->ram.base, log2ceil(u->ram.bytes));
/barrelfish-master/include/vm/
H A Dvm_unix.c80 vm_offset_t new, old, base; local
94 base = round_page((vm_offset_t) vm->vm_daddr);
95 old = base + ctob(vm->vm_dsize);
96 if (new > base) {
101 if (new - base > datalim && new > old) {
109 } else if (new < base) {
133 error = racct_set(td->td_proc, RACCT_DATA, new - base);
143 old - base);
154 old - base);
178 RACCT_DATA, old - base);
[all...]
/barrelfish-master/usr/eclipseclp/lib_tcl/widget/
H A Dwidget.tcl60 ## Specify the "type", "base", & "components" keys of the $CLASS global array
64 ## "base", "basecmd", "container", "class", any option specified in the
205 if {[string compare $class(type) $class(base)]} {
206 ## If -type and -base don't match, we need a special setup
207 lappend dataArrayVals "base \$w.[list [lindex $components(base) 1]]" \
208 "basecmd ${namesp}::\$w.[list [lindex $components(base) 1]]" \
211 ## If the base widget is not the container, then we want to rename
216 #interp alias {} \$base {} ::Widget::handle $namesp \$w
217 set renamingCmd "rename \$base \
[all...]
/barrelfish-master/usr/drivers/iommu/modules/generic/
H A Diommu_service.c73 if (vn->id.type == id.type && vn->id.base == id.base) {
171 IOMMU_SVC_DEBUG("%s. PML4 @ 0x%lx as root vnode\n", __FUNCTION__, id.base);
174 IOMMU_SVC_DEBUG("%s. PDPT @ 0x%lx as root vnode\n", __FUNCTION__, id.base);
177 IOMMU_SVC_DEBUG("%s. PDIR @ 0x%lx as root vnode\n", __FUNCTION__, id.base);
180 IOMMU_SVC_DEBUG("%s. CTXT @ 0x%lx as root vnode\n", __FUNCTION__, id.base );
334 IOMMU_SVC_DEBUG("%s. PML4 @ 0x%lx slot [%u..%lu] flags[%lx]\n", __FUNCTION__, id.base, slot, slot+pte_count - 1, attr);
337 IOMMU_SVC_DEBUG("%s. PDPT @ 0x%lx slot [%u..%lu] flags[%lx]\n", __FUNCTION__, id.base, slot, slot+pte_count - 1, attr );
340 IOMMU_SVC_DEBUG("%s. PDIR @ 0x%lx slot [%u..%lu] flags[%lx]\n", __FUNCTION__, id.base, slot, slot+pte_count - 1, attr);
343 IOMMU_SVC_DEBUG("%s. CTXT @ 0x%lx slot [%u..%lu] flags[%lx]\n", __FUNCTION__, id.base, slo
[all...]
/barrelfish-master/lib/posixcompat/
H A Dnestedpaging.c93 genvaddr_t base; local
94 err = p->f.determine_addr(p, &m, m.size, &base);
98 printf("base: %"PRIxGENVADDR"\n", base);
101 ours.base = base;
117 size_t pml4e = X86_64_PML4_BASE(base);
191 paging_x86_64_map_table(&pdpt_ptr[pdpte], ti.base);
217 paging_x86_64_map_table(&pdir[i], ti.base);
230 paging_x86_64_map(&pt[j], fi.base
[all...]
/barrelfish-master/lib/elf/
H A Delf.c30 * This function loads an ELF binary image, based at 'base' and of size
36 * \param base Base address of ELF binary image in memory.
39 * \param ret_tlsbase Used to return TLS block base address
43 void *state, lvaddr_t base,
48 struct Elf64_Ehdr *head = (struct Elf64_Ehdr *)base;
56 return elf32_load(em_machine, allocate_func, state, base, size,
60 return elf64_load(em_machine, allocate_func, state, base, size,
68 void *state, lvaddr_t base,
71 return elf_load_tls(em_machine, allocate_func, state, base, size,
116 size_t elf_virtual_size(lvaddr_t base) argument
42 elf_load_tls(uint16_t em_machine, elf_allocator_fn allocate_func, void *state, lvaddr_t base, size_t size, genvaddr_t *retentry, genvaddr_t *ret_tlsbase, size_t *ret_tlsinitlen, size_t *ret_tlstotallen) argument
67 elf_load(uint16_t em_machine, elf_allocator_fn allocate_func, void *state, lvaddr_t base, size_t size, genvaddr_t *retentry) argument
140 elf_virtual_base(lvaddr_t base) argument
[all...]
/barrelfish-master/lib/barrelfish/
H A Ddebug.c156 cap->u.physaddr.base, cap->u.physaddr.bytes);
160 cap->u.ram.base, cap->u.ram.bytes);
184 cap->u.frame.base, cap->u.frame.bytes);
189 cap->u.endpointump.base, cap->u.endpointump.bytes,
194 cap->u.frame.base, cap->u.devframe.bytes);
198 cap->u.vnode_arm_l1.base);
202 cap->u.vnode_arm_l2.base);
206 cap->u.vnode_aarch64_l0.base);
210 cap->u.vnode_aarch64_l1.base);
214 cap->u.vnode_aarch64_l2.base);
[all...]
/barrelfish-master/lib/lwip2/src/core/ipv4/
H A Dip4_addr.c158 u8_t base; local
174 base = 10;
178 base = 16;
181 base = 8;
186 val = (val * base) + (u32_t)(c - '0');
188 } else if (base == 16 && isxdigit(c)) {
/barrelfish-master/lib/arranet/
H A Dip_addr.c156 u8_t base; local
171 base = 10;
175 base = 16;
178 base = 8;
182 val = (val * base) + (int)(c - '0');
184 } else if (base == 16 && isxdigit(c)) {
/barrelfish-master/kernel/include/arch/armv8/
H A Dpaging_kernel_arch.h40 uint64_t base :36; // base address of next level table member in struct:armv8_ttable_entry::__anon419
58 uint64_t base :18; member in struct:armv8_ttable_entry::__anon420
77 uint64_t base :27; member in struct:armv8_ttable_entry::__anon421
95 uint64_t base :36; member in struct:armv8_ttable_entry::__anon422
120 lvaddr_t paging_map_device(lpaddr_t base, size_t size);
145 void paging_make_good(lpaddr_t base);
/barrelfish-master/lib/lwip2/src/core/
H A Ddef.c200 const int base = 10; local
207 number /= base;
208 *ptr++ = "zyxwvutsrqponmlkjihgfedcba9876543210123456789abcdefghijklmnopqrstuvwxyz"[35 + (tmp_value - number * base)];
/barrelfish-master/include/arch/k1om/barrelfish_kpi/
H A Dasm_inlines_arch.h184 static inline void cache_flush_range(void *base, size_t len)
188 uint8_t *line = (uint8_t *)((uintptr_t)base & ~(CACHE_LINE_SIZE-1UL));
192 }while (line < (uint8_t *)base + len);
/barrelfish-master/kernel/arch/x86_32/
H A Dexec.c141 "movl 0*4(%[regs]), %%eax \n\t" // EAX was base register
183 * \param base Virtual address of 64-bit word to monitor
188 * Returns when the 64-bit word at base is not equal to lastval.
190 void monitor_mwait(lvaddr_t base, uint64_t lastval, uint32_t extensions, argument
193 volatile uint64_t *val = (uint64_t *)base;
199 monitor(base, extensions, hints);
/barrelfish-master/usr/tests/memtest/
H A Dmem_free.c40 cap.u.ram.base, cap.u.ram.bytes);
58 cap.u.ram.base, cap.u.ram.bytes);
64 cap.u.ram.base, cap.u.ram.bytes);
/barrelfish-master/kernel/arch/arm/
H A Dlpuart.c74 void lpuart_init(unsigned port, lvaddr_t base, bool hwinit) argument
82 lpuart_initialize(u, (mackerel_addr_t) base);
123 assert(u->base != 0);
136 assert(u->base != 0);
/barrelfish-master/kernel/arch/armv8/
H A Dplat_apm88xxxx.c40 if ((lpaddr_t)ports[port].base == (platform_uart_base[port] + KERNEL_OFFSET)) {
64 if ((lpaddr_t)ports[port].base == platform_uart_base[port]) {
85 assert(ports[port].base != 0);
99 assert(ports[port].base != 0);
/barrelfish-master/kernel/arch/x86_64/
H A Dinit.c159 .base = 0
177 .base = 0 // changed by context switch path when doing lldt
222 * \param base Start address of kernel image in physical address space.
225 static void paging_init(lpaddr_t base, size_t size) argument
227 lvaddr_t vbase = local_phys_to_mem(base);
229 // Align base to kernel page size
230 if(base & X86_64_MEM_PAGE_MASK) {
231 size += base & X86_64_MEM_PAGE_MASK;
232 base -= base
[all...]

Completed in 262 milliseconds

1234567891011>>