Searched refs:HW_TRACE (Results 26 - 50 of 65) sorted by relevance

123

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/mips/
H A Ddv-tx3904sio.c287 HW_TRACE ((me, "reset"));
319 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
353 /* HW_TRACE ((me, "byte %d %02x", reg_offset, ((char*)& register_value)[reg_offset])); */
372 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
380 /* HW_TRACE ((me, "byte %d %02x", reg_offset, write_byte)); */
397 /* HW_TRACE ((me, "sdicr - sdisr %08x sdicr %08x",
400 /* HW_TRACE ((me, "sdicr + sdisr %08x sdicr %08x",
420 /* HW_TRACE ((me, "sdisr - sdisr %08x sdicr %08x",
423 /* HW_TRACE ((me, "sdisr + sdisr %08x sdicr %08x",
455 HW_TRACE ((m
[all...]
H A Ddv-tx3904tmr.c289 HW_TRACE ((me, "reset"));
328 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
370 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
392 /* HW_TRACE ((me, "tcr: %08lx", (long) controller->tcr)); */
404 /* HW_TRACE ((me, "itmr: %08lx", (long) controller->itmr)); */
412 /* HW_TRACE ((me, "ccdr: %08lx", (long) controller->ccdr)); */
425 /* HW_TRACE ((me, "pmgr: %08lx", (long) controller->pmgr)); */
438 /* HW_TRACE ((me, "wtmr: %08lx", (long) controller->wtmr)); */
456 /* HW_TRACE ((me, "tisr: %08lx", (long) controller->tisr)); */
464 /* HW_TRACE ((m
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/mips/
H A Ddv-tx3904sio.c287 HW_TRACE ((me, "reset"));
319 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
353 /* HW_TRACE ((me, "byte %d %02x", reg_offset, ((char*)& register_value)[reg_offset])); */
372 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
380 /* HW_TRACE ((me, "byte %d %02x", reg_offset, write_byte)); */
397 /* HW_TRACE ((me, "sdicr - sdisr %08x sdicr %08x",
400 /* HW_TRACE ((me, "sdicr + sdisr %08x sdicr %08x",
420 /* HW_TRACE ((me, "sdisr - sdisr %08x sdicr %08x",
423 /* HW_TRACE ((me, "sdisr + sdisr %08x sdicr %08x",
455 HW_TRACE ((m
[all...]
H A Ddv-tx3904tmr.c289 HW_TRACE ((me, "reset"));
328 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
370 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
392 /* HW_TRACE ((me, "tcr: %08lx", (long) controller->tcr)); */
404 /* HW_TRACE ((me, "itmr: %08lx", (long) controller->itmr)); */
412 /* HW_TRACE ((me, "ccdr: %08lx", (long) controller->ccdr)); */
425 /* HW_TRACE ((me, "pmgr: %08lx", (long) controller->pmgr)); */
438 /* HW_TRACE ((me, "wtmr: %08lx", (long) controller->wtmr)); */
456 /* HW_TRACE ((me, "tisr: %08lx", (long) controller->tisr)); */
464 /* HW_TRACE ((m
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/cris/
H A Ddv-rv.c528 HW_TRACE ((me, "DMA R 0x%x..0x%x", addr, addr + len -1));
532 HW_TRACE ((me, "0x%x: %02x %02x %02x %02x",
586 HW_TRACE ((me, "DMA W 0x%x..0x%x", addr, addr + len - 1));
590 HW_TRACE ((me, "0x%x: %02x %02x %02x %02x",
618 HW_TRACE ((me, "IRQ 0x%x", intval));
704 HW_TRACE ((me, "WD"));
931 HW_TRACE ((me, "REG R 0x%x", addr));
945 HW_TRACE ((me, ":= 0x%02x%02x%02x%02x",
979 HW_TRACE ((me, "MBOX %s 0x%x..0x%x",
983 HW_TRACE ((m
[all...]
H A Ddv-cris.c170 HW_TRACE ((me, "INT value=0x%x", intparam));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/cris/
H A Ddv-rv.c528 HW_TRACE ((me, "DMA R 0x%x..0x%x", addr, addr + len -1));
532 HW_TRACE ((me, "0x%x: %02x %02x %02x %02x",
586 HW_TRACE ((me, "DMA W 0x%x..0x%x", addr, addr + len - 1));
590 HW_TRACE ((me, "0x%x: %02x %02x %02x %02x",
618 HW_TRACE ((me, "IRQ 0x%x", intval));
704 HW_TRACE ((me, "WD"));
931 HW_TRACE ((me, "REG R 0x%x", addr));
945 HW_TRACE ((me, ":= 0x%02x%02x%02x%02x",
979 HW_TRACE ((me, "MBOX %s 0x%x..0x%x",
983 HW_TRACE ((m
[all...]
H A Ddv-cris.c170 HW_TRACE ((me, "INT value=0x%x", intparam));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/cris/
H A Ddv-rv.c528 HW_TRACE ((me, "DMA R 0x%x..0x%x", addr, addr + len -1));
532 HW_TRACE ((me, "0x%x: %02x %02x %02x %02x",
586 HW_TRACE ((me, "DMA W 0x%x..0x%x", addr, addr + len - 1));
590 HW_TRACE ((me, "0x%x: %02x %02x %02x %02x",
618 HW_TRACE ((me, "IRQ 0x%x", intval));
704 HW_TRACE ((me, "WD"));
931 HW_TRACE ((me, "REG R 0x%x", addr));
945 HW_TRACE ((me, ":= 0x%02x%02x%02x%02x",
979 HW_TRACE ((me, "MBOX %s 0x%x..0x%x",
983 HW_TRACE ((m
[all...]
H A Ddv-cris.c170 HW_TRACE ((me, "INT value=0x%x", intparam));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/m68hc11/
H A Ddv-m68hc11spi.c169 HW_TRACE ((me, "SPI reset"));
391 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
436 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
H A Ddv-m68hc11sio.c194 HW_TRACE ((me, "SCI reset"));
502 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
547 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
586 HW_TRACE ((me, "divide rate %ld, baud rate %ld",
H A Ddv-nvram.c265 HW_TRACE ((me, "read 0x%08lx %d [%ld]",
288 HW_TRACE ((me, "write 0x%08lx %d [%ld]",
H A Ddv-m68hc11eepr.c249 HW_TRACE ((me, "EEPROM reset"));
402 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
458 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/m68hc11/
H A Ddv-m68hc11spi.c169 HW_TRACE ((me, "SPI reset"));
391 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
436 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
H A Ddv-m68hc11sio.c194 HW_TRACE ((me, "SCI reset"));
502 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
547 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
586 HW_TRACE ((me, "divide rate %ld, baud rate %ld",
H A Ddv-nvram.c265 HW_TRACE ((me, "read 0x%08lx %d [%ld]",
288 HW_TRACE ((me, "write 0x%08lx %d [%ld]",
H A Ddv-m68hc11eepr.c249 HW_TRACE ((me, "EEPROM reset"));
402 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
458 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/m68hc11/
H A Ddv-m68hc11spi.c169 HW_TRACE ((me, "SPI reset"));
391 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
436 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
H A Ddv-m68hc11sio.c194 HW_TRACE ((me, "SCI reset"));
502 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
547 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
586 HW_TRACE ((me, "divide rate %ld, baud rate %ld",
H A Ddv-nvram.c265 HW_TRACE ((me, "read 0x%08lx %d [%ld]",
288 HW_TRACE ((me, "write 0x%08lx %d [%ld]",
H A Ddv-m68hc11eepr.c249 HW_TRACE ((me, "EEPROM reset"));
402 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
458 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/mips/
H A Ddv-tx3904tmr.c289 HW_TRACE ((me, "reset"));
328 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
370 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
392 /* HW_TRACE ((me, "tcr: %08lx", (long) controller->tcr)); */
404 /* HW_TRACE ((me, "itmr: %08lx", (long) controller->itmr)); */
412 /* HW_TRACE ((me, "ccdr: %08lx", (long) controller->ccdr)); */
425 /* HW_TRACE ((me, "pmgr: %08lx", (long) controller->pmgr)); */
438 /* HW_TRACE ((me, "wtmr: %08lx", (long) controller->wtmr)); */
456 /* HW_TRACE ((me, "tisr: %08lx", (long) controller->tisr)); */
464 /* HW_TRACE ((m
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/mn10300/
H A Ddv-mn103iop.c319 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
502 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/mn10300/
H A Ddv-mn103iop.c319 HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
502 HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));

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