Searched hist:970 (Results 1 - 25 of 48) sorted by relevance

12

/freebsd-10.2-release/sys/dev/hwpmc/
H A Dhwpmc_ppc970.cdiff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
diff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
261342 Sat Feb 01 02:19:32 MST 2014 jhibbits Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.

MFC after: 1 month
261342 Sat Feb 01 02:19:32 MST 2014 jhibbits Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.

MFC after: 1 month
H A Dhwpmc_mpc7xxx.cdiff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
diff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
H A Dhwpmc_powerpc.hdiff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
diff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
H A Dhwpmc_powerpc.cdiff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
diff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
H A Dpmc_events.hdiff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
diff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
/freebsd-10.2-release/sys/powerpc/mambo/
H A Dmambo_disk.c210677 Sat Jul 31 13:23:10 MDT 2010 nwhitehorn Add support for the IBM Full-System Simulator (Mambo). This code has been
developed against the 970 and Cell simulators.
H A Dmambocall.S210677 Sat Jul 31 13:23:10 MDT 2010 nwhitehorn Add support for the IBM Full-System Simulator (Mambo). This code has been
developed against the 970 and Cell simulators.
H A Dmambocall.h210677 Sat Jul 31 13:23:10 MDT 2010 nwhitehorn Add support for the IBM Full-System Simulator (Mambo). This code has been
developed against the 970 and Cell simulators.
H A Dmambo.c210677 Sat Jul 31 13:23:10 MDT 2010 nwhitehorn Add support for the IBM Full-System Simulator (Mambo). This code has been
developed against the 970 and Cell simulators.
H A Dmambo_console.c210677 Sat Jul 31 13:23:10 MDT 2010 nwhitehorn Add support for the IBM Full-System Simulator (Mambo). This code has been
developed against the 970 and Cell simulators.
/freebsd-10.2-release/sys/powerpc/include/
H A Dspr.hdiff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
diff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
diff 194678 Tue Jun 23 04:17:14 MDT 2009 nwhitehorn Fix copy/paste typo in last revision. PMC0 control should be shifted 8
bits, not 6, on the PPC 970.
diff 194374 Wed Jun 17 16:36:03 MDT 2009 nwhitehorn Teach cpu_est_clockrate() about the G5's slightly different PMC. This
allows the boot messages to include the CPU speed and makes possible
the forthcoming cpufreq support for the PPC 970.
diff 190953 Sun Apr 12 03:06:34 MDT 2009 nwhitehorn Rework the way we get the cacheline size. Instead of having a table of
CPUs known to use 128 byte cache lines and defaulting to 32, use the dcbz
instruction to measure it. Also make dcbz behave the way you would
expect on PPC 970.
diff 190681 Sat Apr 04 00:29:13 MDT 2009 nwhitehorn Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by: grehan
H A Dpmc_mdep.hdiff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
diff 263122 Fri Mar 14 00:18:22 MDT 2014 jhibbits MFC r261342

Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events. Thus far only direct events are supported. I included
some documentation in the driver on how indirect events work, but support is
for the future.
H A Dhid.hdiff 190953 Sun Apr 12 03:06:34 MDT 2009 nwhitehorn Rework the way we get the cacheline size. Instead of having a table of
CPUs known to use 128 byte cache lines and defaulting to 32, use the dcbz
instruction to measure it. Also make dcbz behave the way you would
expect on PPC 970.
diff 190681 Sat Apr 04 00:29:13 MDT 2009 nwhitehorn Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by: grehan
H A Dsf_buf.hdiff 190681 Sat Apr 04 00:29:13 MDT 2009 nwhitehorn Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by: grehan
/freebsd-10.2-release/contrib/llvm/patches/
H A Dpatch-r267981-llvm-r211435-fix-ppc-fctiduz.diffdiff 268065 Mon Jun 30 20:31:38 MDT 2014 dim MFC r267981:

Pull in r211627 from upstream llvm trunk (by Bill Schmidt):

[PPC64] Fix PR20071 (fctiduz generated for targets lacking that
instruction)

PR20071 identifies a problem in PowerPC's fast-isel implementation
for floating-point conversion to integer. The fctiduz instruction
was added in Power ISA 2.06 (i.e., Power7 and later). However, this
instruction is being generated regardless of which 64-bit PowerPC
target is selected.

The intent is for fast-isel to punt to DAG selection when this
instruction is not available. This patch implements that change.
For testing purposes, the existing fast-isel-conversion.ll test adds
a RUN line for -mcpu=970 and tests for the expected code generation.
Additionally, the existing test fast-isel-conversion-p5.ll was found
to be incorrectly expecting the unavailable instruction to be
generated. I've removed these test variants since we have adequate
coverage in fast-isel-conversion.ll.

This is needed to compile clang with debug+asserts on older powerpc64
and ppc970 targets.

Requested by: jhibbits

MFC r267982:

Add the llvm patch for r267981.

MFC r268003:

Fix breakage after r267981.

Pointy hat to: dim
/freebsd-10.2-release/sys/powerpc/powerpc/
H A Dcpu.cdiff 225953 Mon Oct 03 21:33:59 MDT 2011 mav Revert r225875, r225877:
It is reported that on some chips (e.g. the 970MP) behavior of POW bit set
simultaneously with modifying other bits is undefined and may cause hangs.
The race should be handled in some other way, but for now just get back.

Reported by: nwitehorn
diff 215101 Wed Nov 10 20:34:51 MST 2010 nwhitehorn Entering deep nap mode on the 970MP requires that both MSR[NAP] and
MSR[DEEPNAP] be set, not just MSR[DEEPNAP]. Fixing this reduces the idle
temperature of my CPUs from 57 to 38 degrees and makes one-shot timer
mode work properly.

Hint from: mav
MFC after: 4 days
diff 204127 Sat Feb 20 16:23:57 MST 2010 nwhitehorn Turn on experimental support for DEEPNAP on the 970MP.
diff 198968 Fri Nov 06 06:20:31 MST 2009 marcel Unbreak E500 builds. The inline assembly for the 970 CPUs
is invalid when compiling for BookE.
diff 194374 Wed Jun 17 16:36:03 MDT 2009 nwhitehorn Teach cpu_est_clockrate() about the G5's slightly different PMC. This
allows the boot messages to include the CPU speed and makes possible
the forthcoming cpufreq support for the PPC 970.
diff 190681 Sat Apr 04 00:29:13 MDT 2009 nwhitehorn Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by: grehan
H A Dbus_machdep.cdiff 190681 Sat Apr 04 00:29:13 MDT 2009 nwhitehorn Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by: grehan
H A Dmem.cdiff 190681 Sat Apr 04 00:29:13 MDT 2009 nwhitehorn Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by: grehan
H A Duio_machdep.cdiff 190681 Sat Apr 04 00:29:13 MDT 2009 nwhitehorn Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by: grehan
/freebsd-10.2-release/sys/powerpc/aim/
H A Dmp_cpudep.cdiff 215197 Fri Nov 12 20:40:01 MST 2010 nwhitehorn Partially revert r215182. There appears to be a silicon bug on the 970
that causes AP bringup to fail if some of the Cell HID-register code
is anywhere in the instruction stream. Pending a better solution, cache
performance on SMP Cell systems running without a hypervisor will be
suboptimal.
diff 190681 Sat Apr 04 00:29:13 MDT 2009 nwhitehorn Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by: grehan
H A Duma_machdep.cdiff 190681 Sat Apr 04 00:29:13 MDT 2009 nwhitehorn Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by: grehan
/freebsd-10.2-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cppdiff 268065 Mon Jun 30 20:31:38 MDT 2014 dim MFC r267981:

Pull in r211627 from upstream llvm trunk (by Bill Schmidt):

[PPC64] Fix PR20071 (fctiduz generated for targets lacking that
instruction)

PR20071 identifies a problem in PowerPC's fast-isel implementation
for floating-point conversion to integer. The fctiduz instruction
was added in Power ISA 2.06 (i.e., Power7 and later). However, this
instruction is being generated regardless of which 64-bit PowerPC
target is selected.

The intent is for fast-isel to punt to DAG selection when this
instruction is not available. This patch implements that change.
For testing purposes, the existing fast-isel-conversion.ll test adds
a RUN line for -mcpu=970 and tests for the expected code generation.
Additionally, the existing test fast-isel-conversion-p5.ll was found
to be incorrectly expecting the unavailable instruction to be
generated. I've removed these test variants since we have adequate
coverage in fast-isel-conversion.ll.

This is needed to compile clang with debug+asserts on older powerpc64
and ppc970 targets.

Requested by: jhibbits

MFC r267982:

Add the llvm patch for r267981.

MFC r268003:

Fix breakage after r267981.

Pointy hat to: dim
/freebsd-10.2-release/sys/dev/uart/
H A Duart_cpu_powerpc.cdiff 190681 Sat Apr 04 00:29:13 MDT 2009 nwhitehorn Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by: grehan
/freebsd-10.2-release/sys/powerpc/powermac/
H A Dcpcht.c190681 Sat Apr 04 00:29:13 MDT 2009 nwhitehorn Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
provided, for example, on the PowerPC 970 (G5), as well as on related CPUs
like the POWER3 and POWER4.

This also adds support for various built-in hardware found on Apple G5
hardware (e.g. the IBM CPC925 northbridge).

Reviewed by: grehan
/freebsd-10.2-release/sys/conf/
H A Doptions.powerpcdiff 210677 Sat Jul 31 13:23:10 MDT 2010 nwhitehorn Add support for the IBM Full-System Simulator (Mambo). This code has been
developed against the 970 and Cell simulators.

Completed in 165 milliseconds

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