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| H A D | c-octeon.c | diff 62597c60 Mon Jul 29 16:07:04 MDT 2013 David Daney <david.daney@cavium.com> MIPS: OCTEON: Set L1 cache parameters for OCTEON3 CPUs. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5638/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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