Searched hist:350 (Results 1 - 25 of 71) sorted by relevance

123

/freebsd-10.2-release/usr.bin/setchannel/
H A DMakefile165023 Sat Dec 09 02:27:45 MST 2006 grog Set channel utility for Hauuapuge PVR-250 and PVR-350.

This s part of an import of the PVR-250 driver. Originally it was
calleed pvr250-setchannel, but it seems better to improve this program
to work for any tuner card, so I'm starting with a more generic name.
That shouldn't mislead anybody: currently the program only works with
the (yet to be committed) cxm driver.

Contributed by: John Wehle <john\@feith.com>
H A Dsetchannel.1165023 Sat Dec 09 02:27:45 MST 2006 grog Set channel utility for Hauuapuge PVR-250 and PVR-350.

This s part of an import of the PVR-250 driver. Originally it was
calleed pvr250-setchannel, but it seems better to improve this program
to work for any tuner card, so I'm starting with a more generic name.
That shouldn't mislead anybody: currently the program only works with
the (yet to be committed) cxm driver.

Contributed by: John Wehle <john\@feith.com>
H A Dsetchannel.c165023 Sat Dec 09 02:27:45 MST 2006 grog Set channel utility for Hauuapuge PVR-250 and PVR-350.

This s part of an import of the PVR-250 driver. Originally it was
calleed pvr250-setchannel, but it seems better to improve this program
to work for any tuner card, so I'm starting with a more generic name.
That shouldn't mislead anybody: currently the program only works with
the (yet to be committed) cxm driver.

Contributed by: John Wehle <john\@feith.com>
/freebsd-10.2-release/sys/dev/an/
H A Dif_anreg.hdiff 199757 Tue Nov 24 17:10:59 MST 2009 jhb - For 350 chips, don't set various INTR bits in TX control word; turning INTR
bits on seems to confuse hardware TX engine.
- For 350 chips, set TX desc's buffer physical address before turning on the
TX desc valid bit.

Submitted by: Jeremy O'Brien obrien654j | gmail, sephe
Obtained from: DragonFly BSD
diff 199757 Tue Nov 24 17:10:59 MST 2009 jhb - For 350 chips, don't set various INTR bits in TX control word; turning INTR
bits on seems to confuse hardware TX engine.
- For 350 chips, set TX desc's buffer physical address before turning on the
TX desc valid bit.

Submitted by: Jeremy O'Brien obrien654j | gmail, sephe
Obtained from: DragonFly BSD
diff 175445 Fri Jan 18 16:31:24 MST 2008 ambrisko First real attempt at proper locking. The locking is a little complicated
since the the command and data that is being built to be sent to or read
from the HW lives in the softc. Commands are later run via an_setdef etc.
In the ioctl path various references are kept to the data stored in
the softc so it needs to be protected. Almost think of the command
in the softc a global variable since it essentially is. Since locking
wasn't done in this type of context the commands would get corrupted.

Thanks to avatar@ for catching some lock issues and dhw@ for testing.

Things are a lot more stable except for the MPI-350 cards. My an(4)
remote laptop stays on the network now.

The driver should be changed so that it uses private memory that is passed
to the functions that talk to the card. Then only those functions would
really need to grab locks.

Reviewed by: avatar@
diff 119156 Wed Aug 20 03:46:05 MDT 2003 ambrisko - Add support for Cisco latest firmware RID sizes that supports 25 SSIDs!
- Fix up TX speed changes.
- Make mpi-350 cards sort-of work with new firmware. It RXs okay but TXs
only work for about 14 packets then fails to get an interrupt. The
TX watchdog fires. It has been reported that my hack for now doesn't
break cards with the older firmware. It appears my card has lost
the ability to RX or TX at all but other peoples cards work. I assume
it got damaged in tansport.

MFC: 1 week.
diff 110531 Sat Feb 08 04:41:17 MST 2003 ambrisko - Fixes for suspend/resume code (MPI-350)
- Cache temp. keys so they are preserved across suspend/resume (MPI-350)
- Reads and writes are real fast to the MPI-350 causing early timeouts so
wait do some DELAYs to slow things down in the spin loops.
- Stream line setting RIDs when they are better to be set via another
function
- Add better support for setting home key via "ifconfig an0 wepkey 9:<key>"

Tested by: Peter Radcliffe <pir@pir.net> (in -stable)
myself in -current & -stable
MFC in: 3 days
diff 110531 Sat Feb 08 04:41:17 MST 2003 ambrisko - Fixes for suspend/resume code (MPI-350)
- Cache temp. keys so they are preserved across suspend/resume (MPI-350)
- Reads and writes are real fast to the MPI-350 causing early timeouts so
wait do some DELAYs to slow things down in the spin loops.
- Stream line setting RIDs when they are better to be set via another
function
- Add better support for setting home key via "ifconfig an0 wepkey 9:<key>"

Tested by: Peter Radcliffe <pir@pir.net> (in -stable)
myself in -current & -stable
MFC in: 3 days
diff 110531 Sat Feb 08 04:41:17 MST 2003 ambrisko - Fixes for suspend/resume code (MPI-350)
- Cache temp. keys so they are preserved across suspend/resume (MPI-350)
- Reads and writes are real fast to the MPI-350 causing early timeouts so
wait do some DELAYs to slow things down in the spin loops.
- Stream line setting RIDs when they are better to be set via another
function
- Add better support for setting home key via "ifconfig an0 wepkey 9:<key>"

Tested by: Peter Radcliffe <pir@pir.net> (in -stable)
myself in -current & -stable
MFC in: 3 days
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
H A Dif_an_pci.cdiff 175445 Fri Jan 18 16:31:24 MST 2008 ambrisko First real attempt at proper locking. The locking is a little complicated
since the the command and data that is being built to be sent to or read
from the HW lives in the softc. Commands are later run via an_setdef etc.
In the ioctl path various references are kept to the data stored in
the softc so it needs to be protected. Almost think of the command
in the softc a global variable since it essentially is. Since locking
wasn't done in this type of context the commands would get corrupted.

Thanks to avatar@ for catching some lock issues and dhw@ for testing.

Things are a lot more stable except for the MPI-350 cards. My an(4)
remote laptop stays on the network now.

The driver should be changed so that it uses private memory that is passed
to the functions that talk to the card. Then only those functions would
really need to grab locks.

Reviewed by: avatar@
diff 119156 Wed Aug 20 03:46:05 MDT 2003 ambrisko - Add support for Cisco latest firmware RID sizes that supports 25 SSIDs!
- Fix up TX speed changes.
- Make mpi-350 cards sort-of work with new firmware. It RXs okay but TXs
only work for about 14 packets then fails to get an interrupt. The
TX watchdog fires. It has been reported that my hack for now doesn't
break cards with the older firmware. It appears my card has lost
the ability to RX or TX at all but other peoples cards work. I assume
it got damaged in tansport.

MFC: 1 week.
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 81221 Mon Aug 06 23:14:16 MDT 2001 brooks Add PCI ID for Cisco Aironet 350 Series cards. The patch differs
slightly from the submitted one.

PR: kern/29415
Submitted by: Bob Fleck <rfleck@cigital.com>
H A Dif_aironet_ieee.hdiff 119156 Wed Aug 20 03:46:05 MDT 2003 ambrisko - Add support for Cisco latest firmware RID sizes that supports 25 SSIDs!
- Fix up TX speed changes.
- Make mpi-350 cards sort-of work with new firmware. It RXs okay but TXs
only work for about 14 packets then fails to get an interrupt. The
TX watchdog fires. It has been reported that my hack for now doesn't
break cards with the older firmware. It appears my card has lost
the ability to RX or TX at all but other peoples cards work. I assume
it got damaged in tansport.

MFC: 1 week.
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
H A Dif_an_pccard.cdiff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 86384 Thu Nov 15 06:26:24 MST 2001 imp Add PC4500 and 350 for newer cards in this line.

Obtained from: NetBSD's an driver (and FreeBSD's /etc/defaults/pccard.conf)
H A Dif_an.cdiff 199757 Tue Nov 24 17:10:59 MST 2009 jhb - For 350 chips, don't set various INTR bits in TX control word; turning INTR
bits on seems to confuse hardware TX engine.
- For 350 chips, set TX desc's buffer physical address before turning on the
TX desc valid bit.

Submitted by: Jeremy O'Brien obrien654j | gmail, sephe
Obtained from: DragonFly BSD
diff 199757 Tue Nov 24 17:10:59 MST 2009 jhb - For 350 chips, don't set various INTR bits in TX control word; turning INTR
bits on seems to confuse hardware TX engine.
- For 350 chips, set TX desc's buffer physical address before turning on the
TX desc valid bit.

Submitted by: Jeremy O'Brien obrien654j | gmail, sephe
Obtained from: DragonFly BSD
diff 175445 Fri Jan 18 16:31:24 MST 2008 ambrisko First real attempt at proper locking. The locking is a little complicated
since the the command and data that is being built to be sent to or read
from the HW lives in the softc. Commands are later run via an_setdef etc.
In the ioctl path various references are kept to the data stored in
the softc so it needs to be protected. Almost think of the command
in the softc a global variable since it essentially is. Since locking
wasn't done in this type of context the commands would get corrupted.

Thanks to avatar@ for catching some lock issues and dhw@ for testing.

Things are a lot more stable except for the MPI-350 cards. My an(4)
remote laptop stays on the network now.

The driver should be changed so that it uses private memory that is passed
to the functions that talk to the card. Then only those functions would
really need to grab locks.

Reviewed by: avatar@
diff 119156 Wed Aug 20 03:46:05 MDT 2003 ambrisko - Add support for Cisco latest firmware RID sizes that supports 25 SSIDs!
- Fix up TX speed changes.
- Make mpi-350 cards sort-of work with new firmware. It RXs okay but TXs
only work for about 14 packets then fails to get an interrupt. The
TX watchdog fires. It has been reported that my hack for now doesn't
break cards with the older firmware. It appears my card has lost
the ability to RX or TX at all but other peoples cards work. I assume
it got damaged in tansport.

MFC: 1 week.
diff 110531 Sat Feb 08 04:41:17 MST 2003 ambrisko - Fixes for suspend/resume code (MPI-350)
- Cache temp. keys so they are preserved across suspend/resume (MPI-350)
- Reads and writes are real fast to the MPI-350 causing early timeouts so
wait do some DELAYs to slow things down in the spin loops.
- Stream line setting RIDs when they are better to be set via another
function
- Add better support for setting home key via "ifconfig an0 wepkey 9:<key>"

Tested by: Peter Radcliffe <pir@pir.net> (in -stable)
myself in -current & -stable
MFC in: 3 days
diff 110531 Sat Feb 08 04:41:17 MST 2003 ambrisko - Fixes for suspend/resume code (MPI-350)
- Cache temp. keys so they are preserved across suspend/resume (MPI-350)
- Reads and writes are real fast to the MPI-350 causing early timeouts so
wait do some DELAYs to slow things down in the spin loops.
- Stream line setting RIDs when they are better to be set via another
function
- Add better support for setting home key via "ifconfig an0 wepkey 9:<key>"

Tested by: Peter Radcliffe <pir@pir.net> (in -stable)
myself in -current & -stable
MFC in: 3 days
diff 110531 Sat Feb 08 04:41:17 MST 2003 ambrisko - Fixes for suspend/resume code (MPI-350)
- Cache temp. keys so they are preserved across suspend/resume (MPI-350)
- Reads and writes are real fast to the MPI-350 causing early timeouts so
wait do some DELAYs to slow things down in the spin loops.
- Stream line setting RIDs when they are better to be set via another
function
- Add better support for setting home key via "ifconfig an0 wepkey 9:<key>"

Tested by: Peter Radcliffe <pir@pir.net> (in -stable)
myself in -current & -stable
MFC in: 3 days
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
/freebsd-10.2-release/sys/boot/ia64/ski/
H A Dskimd.cdiff 219691 Wed Mar 16 03:56:27 MDT 2011 marcel MFaltix:
Add support for Pre-Boot Virtual Memory (PBVM) to the loader.

PBVM allows us to link the kernel at a fixed virtual address without
having to make any assumptions about the physical memory layout. On
the SGI Altix 350 for example, there's no usuable physical memory
below 192GB. Also, the PBVM allows us to control better where we're
going to physically load the kernel and its modules so that we can
make sure we load the kernel in memory that's close to the BSP.

The PBVM is managed by a simple page table. The minimum size of the
page table is 4KB (EFI page size) and the maximum is currently set
to 1MB. A page in the PBVM is 64KB, as that's the maximum alignment
one can specify in a linker script. The bottom line is that PBVM is
between 64KB and 8GB in size.

The loader maps the PBVM page table at a fixed virtual address and
using a single translations. The PBVM itself is also mapped using a
single translation for a maximum of 32MB.

While here, increase the heap in the EFI loader from 512KB to 2MB
and set the stage for supporting relocatable modules.
H A Dconf.cdiff 219691 Wed Mar 16 03:56:27 MDT 2011 marcel MFaltix:
Add support for Pre-Boot Virtual Memory (PBVM) to the loader.

PBVM allows us to link the kernel at a fixed virtual address without
having to make any assumptions about the physical memory layout. On
the SGI Altix 350 for example, there's no usuable physical memory
below 192GB. Also, the PBVM allows us to control better where we're
going to physically load the kernel and its modules so that we can
make sure we load the kernel in memory that's close to the BSP.

The PBVM is managed by a simple page table. The minimum size of the
page table is 4KB (EFI page size) and the maximum is currently set
to 1MB. A page in the PBVM is 64KB, as that's the maximum alignment
one can specify in a linker script. The bottom line is that PBVM is
between 64KB and 8GB in size.

The loader maps the PBVM page table at a fixed virtual address and
using a single translations. The PBVM itself is also mapped using a
single translation for a maximum of 32MB.

While here, increase the heap in the EFI loader from 512KB to 2MB
and set the stage for supporting relocatable modules.
H A Dversiondiff 219691 Wed Mar 16 03:56:27 MDT 2011 marcel MFaltix:
Add support for Pre-Boot Virtual Memory (PBVM) to the loader.

PBVM allows us to link the kernel at a fixed virtual address without
having to make any assumptions about the physical memory layout. On
the SGI Altix 350 for example, there's no usuable physical memory
below 192GB. Also, the PBVM allows us to control better where we're
going to physically load the kernel and its modules so that we can
make sure we load the kernel in memory that's close to the BSP.

The PBVM is managed by a simple page table. The minimum size of the
page table is 4KB (EFI page size) and the maximum is currently set
to 1MB. A page in the PBVM is 64KB, as that's the maximum alignment
one can specify in a linker script. The bottom line is that PBVM is
between 64KB and 8GB in size.

The loader maps the PBVM page table at a fixed virtual address and
using a single translations. The PBVM itself is also mapped using a
single translation for a maximum of 32MB.

While here, increase the heap in the EFI loader from 512KB to 2MB
and set the stage for supporting relocatable modules.
H A Dlibski.hdiff 219691 Wed Mar 16 03:56:27 MDT 2011 marcel MFaltix:
Add support for Pre-Boot Virtual Memory (PBVM) to the loader.

PBVM allows us to link the kernel at a fixed virtual address without
having to make any assumptions about the physical memory layout. On
the SGI Altix 350 for example, there's no usuable physical memory
below 192GB. Also, the PBVM allows us to control better where we're
going to physically load the kernel and its modules so that we can
make sure we load the kernel in memory that's close to the BSP.

The PBVM is managed by a simple page table. The minimum size of the
page table is 4KB (EFI page size) and the maximum is currently set
to 1MB. A page in the PBVM is 64KB, as that's the maximum alignment
one can specify in a linker script. The bottom line is that PBVM is
between 64KB and 8GB in size.

The loader maps the PBVM page table at a fixed virtual address and
using a single translations. The PBVM itself is also mapped using a
single translation for a maximum of 32MB.

While here, increase the heap in the EFI loader from 512KB to 2MB
and set the stage for supporting relocatable modules.
/freebsd-10.2-release/sys/ia64/pci/
H A Dpci_cfgreg.cdiff 253560 Tue Jul 23 03:12:47 MDT 2013 marcel In pci_cfgregread() and pci_cfgregwrite(), multiplex the domain and
bus number into the bus argument. The bus number occupies the least
significant 8 bits. The PCI domain occupies the most significant 24
bits.

On the Altix 350, the PCI domain is a required parameter, but
changing the prototype of the pci_cfgreg*() functions to include a
separate domain argument has wide-spread consequences across the
supported architectures. We'd be changing a known interface.

Multiplexing is an acceptable kluge to give us what we need with
manageable impact. Note that the PCI bus number fits in 8 bits,
so the multiplexing of the domain is a backward compatible change.
/freebsd-10.2-release/usr.sbin/ancontrol/
H A Dancontrol.8diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
H A Dancontrol.cdiff 119156 Wed Aug 20 03:46:05 MDT 2003 ambrisko - Add support for Cisco latest firmware RID sizes that supports 25 SSIDs!
- Fix up TX speed changes.
- Make mpi-350 cards sort-of work with new firmware. It RXs okay but TXs
only work for about 14 packets then fails to get an interrupt. The
TX watchdog fires. It has been reported that my hack for now doesn't
break cards with the older firmware. It appears my card has lost
the ability to RX or TX at all but other peoples cards work. I assume
it got damaged in tansport.

MFC: 1 week.
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
diff 108401 Sun Dec 29 19:22:07 MST 2002 ambrisko Add support for MPI-350 the mini-pci Cisco Aironet card. This needs more
work. The interface was gleaned from the Linux driver. Currently only
one RX & one TX buffer are used. Firmware support is not tested so for the
MPI-350 so it is disabled. Signal cache and monitor mode are not supported
yet. Signal cache is not supported since in encapsulation mode ethernet
frames are returned by the chip. LAN monitor mode support will be added
shortly. Thanks to Warner for the MPI-350 card he sent me.

Add support for RSSI map from PR kern/32880 which was incomplete. Enhanced
with the ability to select the cache mode of raw, dbm or per-cent.

Clean up Signal/Noise/Quality structures and units with help from
Marco Molteni.

Change flash to use a malloc'ed buffer when needed.

PR: kern/32880
Submitted by: Douglas S. J. De Couto decouto@pdos.lcs.mit.edu,
Marco Molteni
MFC: 3 weeks
/freebsd-10.2-release/sys/boot/ia64/efi/
H A Defimd.cdiff 219691 Wed Mar 16 03:56:27 MDT 2011 marcel MFaltix:
Add support for Pre-Boot Virtual Memory (PBVM) to the loader.

PBVM allows us to link the kernel at a fixed virtual address without
having to make any assumptions about the physical memory layout. On
the SGI Altix 350 for example, there's no usuable physical memory
below 192GB. Also, the PBVM allows us to control better where we're
going to physically load the kernel and its modules so that we can
make sure we load the kernel in memory that's close to the BSP.

The PBVM is managed by a simple page table. The minimum size of the
page table is 4KB (EFI page size) and the maximum is currently set
to 1MB. A page in the PBVM is 64KB, as that's the maximum alignment
one can specify in a linker script. The bottom line is that PBVM is
between 64KB and 8GB in size.

The loader maps the PBVM page table at a fixed virtual address and
using a single translations. The PBVM itself is also mapped using a
single translation for a maximum of 32MB.

While here, increase the heap in the EFI loader from 512KB to 2MB
and set the stage for supporting relocatable modules.
H A Dconf.cdiff 219691 Wed Mar 16 03:56:27 MDT 2011 marcel MFaltix:
Add support for Pre-Boot Virtual Memory (PBVM) to the loader.

PBVM allows us to link the kernel at a fixed virtual address without
having to make any assumptions about the physical memory layout. On
the SGI Altix 350 for example, there's no usuable physical memory
below 192GB. Also, the PBVM allows us to control better where we're
going to physically load the kernel and its modules so that we can
make sure we load the kernel in memory that's close to the BSP.

The PBVM is managed by a simple page table. The minimum size of the
page table is 4KB (EFI page size) and the maximum is currently set
to 1MB. A page in the PBVM is 64KB, as that's the maximum alignment
one can specify in a linker script. The bottom line is that PBVM is
between 64KB and 8GB in size.

The loader maps the PBVM page table at a fixed virtual address and
using a single translations. The PBVM itself is also mapped using a
single translation for a maximum of 32MB.

While here, increase the heap in the EFI loader from 512KB to 2MB
and set the stage for supporting relocatable modules.
H A Dversiondiff 219691 Wed Mar 16 03:56:27 MDT 2011 marcel MFaltix:
Add support for Pre-Boot Virtual Memory (PBVM) to the loader.

PBVM allows us to link the kernel at a fixed virtual address without
having to make any assumptions about the physical memory layout. On
the SGI Altix 350 for example, there's no usuable physical memory
below 192GB. Also, the PBVM allows us to control better where we're
going to physically load the kernel and its modules so that we can
make sure we load the kernel in memory that's close to the BSP.

The PBVM is managed by a simple page table. The minimum size of the
page table is 4KB (EFI page size) and the maximum is currently set
to 1MB. A page in the PBVM is 64KB, as that's the maximum alignment
one can specify in a linker script. The bottom line is that PBVM is
between 64KB and 8GB in size.

The loader maps the PBVM page table at a fixed virtual address and
using a single translations. The PBVM itself is also mapped using a
single translation for a maximum of 32MB.

While here, increase the heap in the EFI loader from 512KB to 2MB
and set the stage for supporting relocatable modules.
/freebsd-10.2-release/sys/boot/ia64/common/
H A Dcopy.cdiff 219691 Wed Mar 16 03:56:27 MDT 2011 marcel MFaltix:
Add support for Pre-Boot Virtual Memory (PBVM) to the loader.

PBVM allows us to link the kernel at a fixed virtual address without
having to make any assumptions about the physical memory layout. On
the SGI Altix 350 for example, there's no usuable physical memory
below 192GB. Also, the PBVM allows us to control better where we're
going to physically load the kernel and its modules so that we can
make sure we load the kernel in memory that's close to the BSP.

The PBVM is managed by a simple page table. The minimum size of the
page table is 4KB (EFI page size) and the maximum is currently set
to 1MB. A page in the PBVM is 64KB, as that's the maximum alignment
one can specify in a linker script. The bottom line is that PBVM is
between 64KB and 8GB in size.

The loader maps the PBVM page table at a fixed virtual address and
using a single translations. The PBVM itself is also mapped using a
single translation for a maximum of 32MB.

While here, increase the heap in the EFI loader from 512KB to 2MB
and set the stage for supporting relocatable modules.
H A Dlibia64.hdiff 219691 Wed Mar 16 03:56:27 MDT 2011 marcel MFaltix:
Add support for Pre-Boot Virtual Memory (PBVM) to the loader.

PBVM allows us to link the kernel at a fixed virtual address without
having to make any assumptions about the physical memory layout. On
the SGI Altix 350 for example, there's no usuable physical memory
below 192GB. Also, the PBVM allows us to control better where we're
going to physically load the kernel and its modules so that we can
make sure we load the kernel in memory that's close to the BSP.

The PBVM is managed by a simple page table. The minimum size of the
page table is 4KB (EFI page size) and the maximum is currently set
to 1MB. A page in the PBVM is 64KB, as that's the maximum alignment
one can specify in a linker script. The bottom line is that PBVM is
between 64KB and 8GB in size.

The loader maps the PBVM page table at a fixed virtual address and
using a single translations. The PBVM itself is also mapped using a
single translation for a maximum of 32MB.

While here, increase the heap in the EFI loader from 512KB to 2MB
and set the stage for supporting relocatable modules.
H A Dbootinfo.cdiff 219691 Wed Mar 16 03:56:27 MDT 2011 marcel MFaltix:
Add support for Pre-Boot Virtual Memory (PBVM) to the loader.

PBVM allows us to link the kernel at a fixed virtual address without
having to make any assumptions about the physical memory layout. On
the SGI Altix 350 for example, there's no usuable physical memory
below 192GB. Also, the PBVM allows us to control better where we're
going to physically load the kernel and its modules so that we can
make sure we load the kernel in memory that's close to the BSP.

The PBVM is managed by a simple page table. The minimum size of the
page table is 4KB (EFI page size) and the maximum is currently set
to 1MB. A page in the PBVM is 64KB, as that's the maximum alignment
one can specify in a linker script. The bottom line is that PBVM is
between 64KB and 8GB in size.

The loader maps the PBVM page table at a fixed virtual address and
using a single translations. The PBVM itself is also mapped using a
single translation for a maximum of 32MB.

While here, increase the heap in the EFI loader from 512KB to 2MB
and set the stage for supporting relocatable modules.
/freebsd-10.2-release/sys/ia64/ia64/
H A Dhighfp.cdiff 205234 Wed Mar 17 00:51:12 MDT 2010 marcel Revamp the interrupt code based on the previous commit:
o Introduce XIV, eXternal Interrupt Vector, to differentiate from
the interrupts vectors that are offsets in the IVT (Interrupt
Vector Table). There's a vector for external interrupts, which
are based on the XIVs.

o Keep track of allocated and reserved XIVs so that we can assign
XIVs without hardcoding anything. When XIVs are allocated, an
interrupt handler and a class is specified for the XIV. Classes
are:
1. architecture-defined: XIV 15 is returned when no external
interrupt are pending,
2. platform-defined: SAL reports which XIV is used to wakeup
an AP (typically 0xFF, but it's 0x12 for the Altix 350).
3. inter-processor interrupts: allocated for SMP support and
non-redirectable.
4. device interrupts (i.e. IRQs): allocated when devices are
discovered and are redirectable.

o Rewrite the central interrupt handler to call the per-XIV
interrupt handler and rename it to ia64_handle_intr(). Move
the per-XIV handler implementation to the file where we have
the XIV allocation/reservation. Clock interrupt handling is
moved to clock.c. IPI handling is moved to mp_machdep.c.

o Drop support for the Intel 8259A because it was broken. When
XIV 0 is received, the CPU should initiate an INTA cycle to
obtain the interrupt vector of the 8259-based interrupt. In
these cases the interrupt controller we should be talking to
WRT to masking on signalling EOI is the 8259 and not the I/O
SAPIC. This requires adriver for the Intel 8259A which isn't
available for ia64. Thus stop pretending to support ExtINTs
and instead panic() so that if we come across hardware that
has an Intel 8259A, so have something real to work with.

o With XIVs for IPIs dynamically allocatedi and also based on
priority, define the IPI_* symbols as variables rather than
constants. The variable holds the XIV allocated for the IPI.

o IPI_STOP_HARD delivers a NMI if possible. Otherwise the XIV
assigned to IPI_STOP is delivered.
/freebsd-10.2-release/sys/ia64/include/
H A Dintrcnt.hdiff 205234 Wed Mar 17 00:51:12 MDT 2010 marcel Revamp the interrupt code based on the previous commit:
o Introduce XIV, eXternal Interrupt Vector, to differentiate from
the interrupts vectors that are offsets in the IVT (Interrupt
Vector Table). There's a vector for external interrupts, which
are based on the XIVs.

o Keep track of allocated and reserved XIVs so that we can assign
XIVs without hardcoding anything. When XIVs are allocated, an
interrupt handler and a class is specified for the XIV. Classes
are:
1. architecture-defined: XIV 15 is returned when no external
interrupt are pending,
2. platform-defined: SAL reports which XIV is used to wakeup
an AP (typically 0xFF, but it's 0x12 for the Altix 350).
3. inter-processor interrupts: allocated for SMP support and
non-redirectable.
4. device interrupts (i.e. IRQs): allocated when devices are
discovered and are redirectable.

o Rewrite the central interrupt handler to call the per-XIV
interrupt handler and rename it to ia64_handle_intr(). Move
the per-XIV handler implementation to the file where we have
the XIV allocation/reservation. Clock interrupt handling is
moved to clock.c. IPI handling is moved to mp_machdep.c.

o Drop support for the Intel 8259A because it was broken. When
XIV 0 is received, the CPU should initiate an INTA cycle to
obtain the interrupt vector of the 8259-based interrupt. In
these cases the interrupt controller we should be talking to
WRT to masking on signalling EOI is the 8259 and not the I/O
SAPIC. This requires adriver for the Intel 8259A which isn't
available for ia64. Thus stop pretending to support ExtINTs
and instead panic() so that if we come across hardware that
has an Intel 8259A, so have something real to work with.

o With XIVs for IPIs dynamically allocatedi and also based on
priority, define the IPI_* symbols as variables rather than
constants. The variable holds the XIV allocated for the IPI.

o IPI_STOP_HARD delivers a NMI if possible. Otherwise the XIV
assigned to IPI_STOP is delivered.
/freebsd-10.2-release/sys/boot/efi/libefi/
H A Dlibefi.cdiff 219691 Wed Mar 16 03:56:27 MDT 2011 marcel MFaltix:
Add support for Pre-Boot Virtual Memory (PBVM) to the loader.

PBVM allows us to link the kernel at a fixed virtual address without
having to make any assumptions about the physical memory layout. On
the SGI Altix 350 for example, there's no usuable physical memory
below 192GB. Also, the PBVM allows us to control better where we're
going to physically load the kernel and its modules so that we can
make sure we load the kernel in memory that's close to the BSP.

The PBVM is managed by a simple page table. The minimum size of the
page table is 4KB (EFI page size) and the maximum is currently set
to 1MB. A page in the PBVM is 64KB, as that's the maximum alignment
one can specify in a linker script. The bottom line is that PBVM is
between 64KB and 8GB in size.

The loader maps the PBVM page table at a fixed virtual address and
using a single translations. The PBVM itself is also mapped using a
single translation for a maximum of 32MB.

While here, increase the heap in the EFI loader from 512KB to 2MB
and set the stage for supporting relocatable modules.
/freebsd-10.2-release/sys/fs/msdosfs/
H A Ddirentry.hdiff 154692 Sun Jan 22 21:09:38 MST 2006 fjoe Do not assume that `char direntry::deExtension[3]' starts right after
`char direntry::deName[8]' and access deExtension[] explicitly.

Found by: Coverity Prevent(tm)
CID: 350, 351, 352

Completed in 232 milliseconds

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