Searched hist:344213 (Results 1 - 25 of 69) sorted by relevance
/freebsd-11-stable/lib/libc++experimental/ | ||
H A D | Makefile | 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/sys/conf/ | ||
H A D | ldscript.i386 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
H A D | kern.mk | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/sys/modules/fxp/ | ||
H A D | Makefile | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/lli/ | ||
H A D | Makefile | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
H A D | lli.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-mca/ | ||
H A D | llvm-mca.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-tblgen/ | ||
H A D | llvm-tblgen.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/clang/ | ||
H A D | Makefile | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
H A D | clang.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-xray/ | ||
H A D | Makefile | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/opt/ | ||
H A D | Makefile | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
H A D | opt.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llc/ | ||
H A D | llc.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/bugpoint/ | ||
H A D | bugpoint.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-profdata/ | ||
H A D | llvm-profdata.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-pdbutil/ | ||
H A D | llvm-pdbutil.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-nm/ | ||
H A D | llvm-nm.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-symbolizer/ | ||
H A D | llvm-symbolizer.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-link/ | ||
H A D | llvm-link.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-ar/ | ||
H A D | llvm-ar.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-cov/ | ||
H A D | llvm-cov.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-dwarfdump/ | ||
H A D | llvm-dwarfdump.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-bcanalyzer/ | ||
H A D | llvm-bcanalyzer.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
/freebsd-11-stable/usr.bin/clang/llvm-extract/ | ||
H A D | llvm-extract.1 | diff 344213 Sat Feb 16 15:57:29 MST 2019 dim Merge clang 7.0.1 and several follow-up changes MFC r318594: Add libc++experimental.a for std::experimental support This adds a separate library for supporting std::experimental features. It is purposefully static, and must be explicitly linked into programs using -lc++experimental. PLEASE NOTE: there is NO WARRANTY as to any stability or continuing existence of the features in the std::experimental parts of the C++ library! Reviewed by: ed Differential Revision: https://reviews.freebsd.org/D10840 MFC r318598: Add PICFLAG to build libc++experimental.a, so it can be used in all situations. Noticed by: kib r336969 | emaste | 2018-07-31 16:12:09 +0200 (Tue, 31 Jul 2018) | 13 lines llvm: [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN. This patch adds the flags in addition to the existing ones so that any code depending on the old names will still work. Obtained from: llvm r338370 by Peter Smith r336970 | emaste | 2018-07-31 16:14:41 +0200 (Tue, 31 Jul 2018) | 9 lines llvm: [ARM] Complete enumeration values for Tag_ABI_VFP_args The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen values of 3 (toolchain specific) and 4 compatible with both Base and VFP. Add the missing enumeration values so that LLD can refer to them without having to use the raw numbers. Obtained from: llvm r338373 by Peter Smith r336972 | emaste | 2018-07-31 17:25:03 +0200 (Tue, 31 Jul 2018) | 37 lines lld: [ELF][ARM] Implement support for Tag_ABI_VFP_args The Tag_ABI_VFP_args build attribute controls the procedure call standard used for floating point parameters on ARM. The values are: 0 - Base AAPCS (FP Parameters passed in Core (Integer) registers 1 - VFP AAPCS (FP Parameters passed in FP registers) 2 - Toolchain specific (Neither Base or VFP) 3 - Compatible with all (No use of floating point parameters) If the Tag_ABI_VFP_args build attribute is missing it has an implicit value of 0. We use the attribute in two ways: * Detect a clash in calling convention between Base, VFP and Toolchain. we follow ld.bfd's lead and do not error if there is a clash between an implicit Base AAPCS caused by a missing attribute. Many projects including the hard-float (VFP AAPCS) version of glibc contain assembler files that do not use floating point but do not have Tag_ABI_VFP_args. * Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag for Base or VFP AAPCS respectively. This flag is used by some ELF loaders. References: * Addenda to, and Errata in, the ABI for the ARM Architecture for Tag_ABI_VFP_args * Elf for the ARM Architecture for ELF header flags Fixes LLVM PR36009 PR: 229050 Obtained from: llvm r338377 by Peter Smith r337282 | alc | 2018-08-04 04:30:51 +0200 (Sat, 04 Aug 2018) | 7 lines Set the default image base on arm64 and i386 to a superpage-aligned address. Reviewed by: emaste, markj Discussed with: dim Differential Revision: https://reviews.freebsd.org/D16385 r339304 | emaste | 2018-10-11 15:19:17 +0200 (Thu, 11 Oct 2018) | 13 lines lld: set sh_link and sh_info for .rela.plt sections ELF spec says that for SHT_REL and SHT_RELA sh_link should reference the associated string table and sh_info should reference the "section to which the relocation applies." ELF Tool Chain's elfcopy / strip use this (in part) to control whether or not the relocation entry is copied to the output. LLVM PR 37538 https://bugs.llvm.org/show_bug.cgi?id=37538 Approved by: re (kib) Obtained from: llvm r344226 (backported for 6.0) MFC r341825: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt and libc++ to the upstream release_70 branch r348686 (effectively, 7.0.1 rc3). The release will follow very soon, but no more functional changes are expected. Release notes for llvm, clang and lld 7.0.0 are available here: <http://releases.llvm.org/7.0.0/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/clang/docs/ReleaseNotes.html> <http://releases.llvm.org/7.0.0/tools/lld/docs/ReleaseNotes.html> PR: 230240, 230355 Relnotes: yes MFC r342123: Update clang, llvm, lld, lldb, compiler-rt and libc++ version number to 7.0.1 release r349250. There were no functional changes since the 7.0.1 rc3 import. PR: 230240, 230355 Relnotes: yes r343429 | emaste | 2019-01-25 15:46:13 +0100 (Fri, 25 Jan 2019) | 16 lines clang: default to DWARF 4 as of FreeBSD 13 FreeBSD previously defaulted to DWARF 2 because several tools (gdb, ctfconvert, etc.) did not support later versions. These have either been fixed or are deprecated. Note that gdb 6 still exists but has been moved out of $PATH into /usr/libexec and is intended only for use by crashinfo(8). The kernel build sets the DWARF version explicitly via -gdwarf2, so this should have no effect there. PR: 234887 [exp-run] Reviewed by: markj Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D17930 MFC r343916: Pull in r352607 from upstream llvm trunk (by Craig Topper): [X86] Add FPSW as a Def on some FP instructions that were missing it. Pull in r353141 from upstream llvm trunk (by Craig Topper): [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them. Summary: We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly. This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that. Reviewers: rnk Reviewed By: rnk Subscribers: eraman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57641 Pull in r353489 from upstream llvm trunk (by Craig Topper): [X86] Add FPCW as a register and start using it as an implicit use on floating point instructions. Summary: FPCW contains the rounding mode control which we manipulate to implement fp to integer conversion by changing the roudning mode, storing the value to the stack, and then changing the rounding mode back. Because we didn't model FPCW and its dependency chain, other instructions could be scheduled into the middle of the sequence. This patch introduces the register and adds it as an implciit def of FLDCW and implicit use of the FP binary arithmetic instructions and store instructions. There are more instructions that need to be updated, but this is a good start. I believe this fixes at least the reduced test case from PR40529. Reviewers: RKSimon, spatel, rnk, efriedma, andrew.w.kaylor Subscribers: dim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D57735 These should fix a problem in clang 7.0 where it would sometimes emit long double floating point instructions in a slightly wrong order, leading to failures in our libm tests. In particular, the cbrt_test test case 'cbrtl_powl' and the trig_test test case 'reduction'. Also bump __FreeBSD_cc_version, to be able to detect this in our test suite. Reported by: lwhsu PR: 234040 Upstream PR: https://bugs.llvm.org/show_bug.cgi?id=40206 MFC r344056: Pull in r339734 from upstream llvm trunk (by Eli Friedman): [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. Intentionally excluding nodes from the DAGCombine worklist is likely to lead to weird optimizations and infinite loops, so it's generally a bad idea. To avoid the infinite loops, fix DAGCombine to use the isDesirableToCommuteWithShift target hook before performing the transforms in question, and implement the target hook in the ARM backend disable the transforms in question. Fixes https://bugs.llvm.org/show_bug.cgi?id=38530 . (I don't have a reduced testcase for that bug. But we should have sufficient test coverage for PerformSHLSimplify given that we're not playing weird tricks with the worklist. I can try to bugpoint it if necessary, though.) Differential Revision: https://reviews.llvm.org/D50667 This should fix a possible hang when compiling sys/dev/nxge/if_nxge.c (which exists now only in the stable/11 branch) for arm. |
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