Searched hist:291008 (Results 1 - 4 of 4) sorted by relevance
/freebsd-11.0-release/sys/powerpc/mpc85xx/ | ||
H A D | mpc85xx.c | diff 291008 Wed Nov 18 01:55:41 MST 2015 jhibbits Add support for new LAW registers in QorIQ SoCs. QorIQ SoCs (e5500 core, P5 family) have 2 BARs for local access windows, while MPC85XX, and P1/P2 families use only a single BAR register. This also adds the QORIQ_DPAA option, mutually exclusive to MPC85XX, to handle this difference. Obtained from: Semihalf Sponsored by: Alex Perez/Inertial Computing |
H A D | mpc85xx.h | diff 291008 Wed Nov 18 01:55:41 MST 2015 jhibbits Add support for new LAW registers in QorIQ SoCs. QorIQ SoCs (e5500 core, P5 family) have 2 BARs for local access windows, while MPC85XX, and P1/P2 families use only a single BAR register. This also adds the QORIQ_DPAA option, mutually exclusive to MPC85XX, to handle this difference. Obtained from: Semihalf Sponsored by: Alex Perez/Inertial Computing |
/freebsd-11.0-release/sys/conf/ | ||
H A D | options.powerpc | diff 291008 Wed Nov 18 01:55:41 MST 2015 jhibbits Add support for new LAW registers in QorIQ SoCs. QorIQ SoCs (e5500 core, P5 family) have 2 BARs for local access windows, while MPC85XX, and P1/P2 families use only a single BAR register. This also adds the QORIQ_DPAA option, mutually exclusive to MPC85XX, to handle this difference. Obtained from: Semihalf Sponsored by: Alex Perez/Inertial Computing |
H A D | files.powerpc | diff 291008 Wed Nov 18 01:55:41 MST 2015 jhibbits Add support for new LAW registers in QorIQ SoCs. QorIQ SoCs (e5500 core, P5 family) have 2 BARs for local access windows, while MPC85XX, and P1/P2 families use only a single BAR register. This also adds the QORIQ_DPAA option, mutually exclusive to MPC85XX, to handle this difference. Obtained from: Semihalf Sponsored by: Alex Perez/Inertial Computing |
Completed in 132 milliseconds