Searched hist:277498 (Results 1 - 4 of 4) sorted by relevance
/freebsd-11.0-release/sys/powerpc/include/ | ||
H A D | trap.h | diff 277498 Wed Jan 21 19:14:39 MST 2015 nwhitehorn Make 64-bit AIM trap handlers relocatable by changing all absolute branch instructions to call through pointers instead. In general, these are set implicitly through relocation processing. One has to be set explicitly in machdep.c, however, to fit one handler in the tiny (8 instruction) space available. Reviewed by: andreast Differential revision: D1554 Tested on: UP and SMP G5, Cell, POWER5+ |
/freebsd-11.0-release/sys/powerpc/aim/ | ||
H A D | trap_subr64.S | diff 277498 Wed Jan 21 19:14:39 MST 2015 nwhitehorn Make 64-bit AIM trap handlers relocatable by changing all absolute branch instructions to call through pointers instead. In general, these are set implicitly through relocation processing. One has to be set explicitly in machdep.c, however, to fit one handler in the tiny (8 instruction) space available. Reviewed by: andreast Differential revision: D1554 Tested on: UP and SMP G5, Cell, POWER5+ |
H A D | aim_machdep.c | diff 277498 Wed Jan 21 19:14:39 MST 2015 nwhitehorn Make 64-bit AIM trap handlers relocatable by changing all absolute branch instructions to call through pointers instead. In general, these are set implicitly through relocation processing. One has to be set explicitly in machdep.c, however, to fit one handler in the tiny (8 instruction) space available. Reviewed by: andreast Differential revision: D1554 Tested on: UP and SMP G5, Cell, POWER5+ |
/freebsd-11.0-release/sys/powerpc/powerpc/ | ||
H A D | machdep.c | diff 277498 Wed Jan 21 19:14:39 MST 2015 nwhitehorn Make 64-bit AIM trap handlers relocatable by changing all absolute branch instructions to call through pointers instead. In general, these are set implicitly through relocation processing. One has to be set explicitly in machdep.c, however, to fit one handler in the tiny (8 instruction) space available. Reviewed by: andreast Differential revision: D1554 Tested on: UP and SMP G5, Cell, POWER5+ |
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