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H A D | PB92 | diff 276741 Tue Jan 06 05:44:33 MST 2015 adrian Make the apb.c code optional behind ar71xx_apb rather than standard. The QCA955x has more mux interrupts going on - and the AR934x actually does, but I cheated and assigned wlan and pcie to the same interrupt line. They are, there's just a status register mux that I should've been using. Luckily this isn't too bad a change in itself - almost all of the Atheros MIPS configurations use a _BASE file to inherit from. Except PB92, which I should really fix up at some point. The AR934x will use the legacy apb for now until I write its replacement. The QCA955x SoC I'm doing bring-up on will have a separate qca955x_apb.c implementation that includes hooking into IP2/IP3 and doing further interrupt demuxing as appropriate. |
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