Searched hist:274752 (Results 1 - 6 of 6) sorted by relevance
| /freebsd-11.0-release/sys/mips/include/ | ||
| H A D | cache_mipsNN.h | diff 274752 Thu Nov 20 17:09:05 MST 2014 br Add L2-cache writeback/flush operations. Supported 32,128-byte line-size, else ignored. Cavium Networks also ignored as it has non-standard config registers. Obtained from: NetBSD Sponsored by: DARPA, AFRL |
| H A D | cpuinfo.h | diff 274752 Thu Nov 20 17:09:05 MST 2014 br Add L2-cache writeback/flush operations. Supported 32,128-byte line-size, else ignored. Cavium Networks also ignored as it has non-standard config registers. Obtained from: NetBSD Sponsored by: DARPA, AFRL |
| H A D | cpuregs.h | diff 274752 Thu Nov 20 17:09:05 MST 2014 br Add L2-cache writeback/flush operations. Supported 32,128-byte line-size, else ignored. Cavium Networks also ignored as it has non-standard config registers. Obtained from: NetBSD Sponsored by: DARPA, AFRL |
| /freebsd-11.0-release/sys/mips/mips/ | ||
| H A D | cache.c | diff 274752 Thu Nov 20 17:09:05 MST 2014 br Add L2-cache writeback/flush operations. Supported 32,128-byte line-size, else ignored. Cavium Networks also ignored as it has non-standard config registers. Obtained from: NetBSD Sponsored by: DARPA, AFRL |
| H A D | cache_mipsNN.c | diff 274752 Thu Nov 20 17:09:05 MST 2014 br Add L2-cache writeback/flush operations. Supported 32,128-byte line-size, else ignored. Cavium Networks also ignored as it has non-standard config registers. Obtained from: NetBSD Sponsored by: DARPA, AFRL |
| H A D | cpu.c | diff 274752 Thu Nov 20 17:09:05 MST 2014 br Add L2-cache writeback/flush operations. Supported 32,128-byte line-size, else ignored. Cavium Networks also ignored as it has non-standard config registers. Obtained from: NetBSD Sponsored by: DARPA, AFRL |
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