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| /freebsd-10.2-release/sys/arm/mv/ | ||
| H A D | mv_pci.c | diff 240493 Fri Sep 14 10:09:53 MDT 2012 gber Implement MSI support. MSI are implemented via Inbound Shared Doorbell 1 interrupts. Interrupts are triggered by writing to Software Triggered Interrupt registeri (PCIe card using physical address of this register in BAR0 space). There are 32 interrupts available. It can be increased by using Doorbell 2 and Doorbell 3 registers to 96 interrupts. Obtained from: Marvell, Semihalf |
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