Searched hist:234906 (Results 1 - 5 of 5) sorted by relevance
| /freebsd-10.0-release/sys/mips/atheros/ | ||
| H A D | ar71xx_chip.h | diff 234906 Tue May 01 23:34:23 MDT 2012 adrian MII related infrastructure changes. * Add a new method to set the MII mode - GMII, RGMII, RMII, MII. + arge0 supports all four (two for non-Gige interfaces.) + arge1 only supports two (one for non-gige interfaces.) * Set the MII clock speed when changing the MAC PLL speed. + Needed for AR91xx and AR71xx; not needed for AR724x. Tested: * AR71xx only, I'll do AR913x testing tonight and fix whichever issues creep up. TODO: * Implement the missing AR7242 arge0 PLL configuration, but don't adjust the MII speed accordingly. * .. the AR7240/AR7241 don't require this, so make sure it's not set accidentally. Bugs (not fixed here): * Statically configured arge speeds are still broken - investigate why that is on the AP96 board. Autonegotiate is working fine, but there still seems to be an occasionally heavy packet loss issue. Obtained from: Linux/Atheros/OpenWRT |
| H A D | ar71xx_cpudef.h | diff 234906 Tue May 01 23:34:23 MDT 2012 adrian MII related infrastructure changes. * Add a new method to set the MII mode - GMII, RGMII, RMII, MII. + arge0 supports all four (two for non-Gige interfaces.) + arge1 only supports two (one for non-gige interfaces.) * Set the MII clock speed when changing the MAC PLL speed. + Needed for AR91xx and AR71xx; not needed for AR724x. Tested: * AR71xx only, I'll do AR913x testing tonight and fix whichever issues creep up. TODO: * Implement the missing AR7242 arge0 PLL configuration, but don't adjust the MII speed accordingly. * .. the AR7240/AR7241 don't require this, so make sure it's not set accidentally. Bugs (not fixed here): * Statically configured arge speeds are still broken - investigate why that is on the AP96 board. Autonegotiate is working fine, but there still seems to be an occasionally heavy packet loss issue. Obtained from: Linux/Atheros/OpenWRT |
| H A D | ar724x_chip.c | diff 234906 Tue May 01 23:34:23 MDT 2012 adrian MII related infrastructure changes. * Add a new method to set the MII mode - GMII, RGMII, RMII, MII. + arge0 supports all four (two for non-Gige interfaces.) + arge1 only supports two (one for non-gige interfaces.) * Set the MII clock speed when changing the MAC PLL speed. + Needed for AR91xx and AR71xx; not needed for AR724x. Tested: * AR71xx only, I'll do AR913x testing tonight and fix whichever issues creep up. TODO: * Implement the missing AR7242 arge0 PLL configuration, but don't adjust the MII speed accordingly. * .. the AR7240/AR7241 don't require this, so make sure it's not set accidentally. Bugs (not fixed here): * Statically configured arge speeds are still broken - investigate why that is on the AP96 board. Autonegotiate is working fine, but there still seems to be an occasionally heavy packet loss issue. Obtained from: Linux/Atheros/OpenWRT |
| H A D | ar91xx_chip.c | diff 234906 Tue May 01 23:34:23 MDT 2012 adrian MII related infrastructure changes. * Add a new method to set the MII mode - GMII, RGMII, RMII, MII. + arge0 supports all four (two for non-Gige interfaces.) + arge1 only supports two (one for non-gige interfaces.) * Set the MII clock speed when changing the MAC PLL speed. + Needed for AR91xx and AR71xx; not needed for AR724x. Tested: * AR71xx only, I'll do AR913x testing tonight and fix whichever issues creep up. TODO: * Implement the missing AR7242 arge0 PLL configuration, but don't adjust the MII speed accordingly. * .. the AR7240/AR7241 don't require this, so make sure it's not set accidentally. Bugs (not fixed here): * Statically configured arge speeds are still broken - investigate why that is on the AP96 board. Autonegotiate is working fine, but there still seems to be an occasionally heavy packet loss issue. Obtained from: Linux/Atheros/OpenWRT |
| H A D | ar71xx_chip.c | diff 234906 Tue May 01 23:34:23 MDT 2012 adrian MII related infrastructure changes. * Add a new method to set the MII mode - GMII, RGMII, RMII, MII. + arge0 supports all four (two for non-Gige interfaces.) + arge1 only supports two (one for non-gige interfaces.) * Set the MII clock speed when changing the MAC PLL speed. + Needed for AR91xx and AR71xx; not needed for AR724x. Tested: * AR71xx only, I'll do AR913x testing tonight and fix whichever issues creep up. TODO: * Implement the missing AR7242 arge0 PLL configuration, but don't adjust the MII speed accordingly. * .. the AR7240/AR7241 don't require this, so make sure it's not set accidentally. Bugs (not fixed here): * Statically configured arge speeds are still broken - investigate why that is on the AP96 board. Autonegotiate is working fine, but there still seems to be an occasionally heavy packet loss issue. Obtained from: Linux/Atheros/OpenWRT |
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