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| /freebsd-10.0-release/sys/mips/atheros/ | ||
| H A D | ar71xx_pci.c | diff 234204 Fri Apr 13 04:21:42 MDT 2012 adrian Sync this code against what's in OpenWRT trunk. * the openwrt code doesn't treat 0/0/0 any differently from other bus/slot/func combinations. * A "local write" function writes to the LCONF area, and so I've added it. * The PCI workaround at attach time uses this LCONF code, which it already did .. * .. but it is a 4 byte write, not a 2 byte write. Even though it's PCIR_COMMAND which is a two byte PCI register. Tested on: AR7161 TODO: The other two AR71xx derivatives TODO: More thoroughly stare at the datasheets I do have and if it indeed is incorrect, push fixes to both FreeBSD and Linux/OpenWRT. Obtained from: Linux OpenWRT |
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