Searched hist:212366 (Results 1 - 3 of 3) sorted by relevance
| /freebsd-9.3-release/sys/mips/rmi/ | ||
| H A D | rmi_mips_exts.h | diff 212366 Thu Sep 09 15:52:13 MDT 2010 jchandra Clean up and update sys/mips/rmi/rmi_mips_exts.h - Provide 64 bit implementations for some macros. On n64 and n32, don't split 64 bit values. - No need for 32 bit ops for control registers. - Fix few bugs (write control reg, write_c0_register64). - Re-write EIRR/EIMR/CPUID operations using read_c0_registerXX, no need of inline assembly. - rename control reg access functions to avoid phnx, update callers. - stlye/whitespace fixes. |
| H A D | xlr_pci.c | diff 212366 Thu Sep 09 15:52:13 MDT 2010 jchandra Clean up and update sys/mips/rmi/rmi_mips_exts.h - Provide 64 bit implementations for some macros. On n64 and n32, don't split 64 bit values. - No need for 32 bit ops for control registers. - Fix few bugs (write control reg, write_c0_register64). - Re-write EIRR/EIMR/CPUID operations using read_c0_registerXX, no need of inline assembly. - rename control reg access functions to avoid phnx, update callers. - stlye/whitespace fixes. |
| H A D | xlr_machdep.c | diff 212366 Thu Sep 09 15:52:13 MDT 2010 jchandra Clean up and update sys/mips/rmi/rmi_mips_exts.h - Provide 64 bit implementations for some macros. On n64 and n32, don't split 64 bit values. - No need for 32 bit ops for control registers. - Fix few bugs (write control reg, write_c0_register64). - Re-write EIRR/EIMR/CPUID operations using read_c0_registerXX, no need of inline assembly. - rename control reg access functions to avoid phnx, update callers. - stlye/whitespace fixes. |
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