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| /freebsd-10.2-release/sys/sparc64/include/ | ||
| H A D | tte.h | diff 182767 Thu Sep 04 19:58:12 MDT 2008 marius The physical address space of cheetah-class CPUs has been extended to 43 bits so update TD_PA_BITS accordingly. For the most part this increase is transparent to the existing code except for when reading the physical address from ASI_{D,I}TLB_DATA_ACCESS_REG, which we only do in the loader and which was already adjusted in r182478, or from the OFW translations node. While at it, ensure we are only taking valid OFW mapping entries into account. |
| /freebsd-10.2-release/sys/sparc64/sparc64/ | ||
| H A D | pmap.c | diff 182767 Thu Sep 04 19:58:12 MDT 2008 marius The physical address space of cheetah-class CPUs has been extended to 43 bits so update TD_PA_BITS accordingly. For the most part this increase is transparent to the existing code except for when reading the physical address from ASI_{D,I}TLB_DATA_ACCESS_REG, which we only do in the loader and which was already adjusted in r182478, or from the OFW translations node. While at it, ensure we are only taking valid OFW mapping entries into account. |
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