Searched hist:181953 (Results 1 - 2 of 2) sorted by relevance
| /freebsd-10-stable/sys/dev/bfe/ | ||
| H A D | if_bfereg.h | diff 181953 Thu Aug 21 02:33:24 MDT 2008 yongari o Sort includes and add <endian.h> to support endianness. o Removed unneeded header files. o bus_dma(9) fix: - created parent tag with 1GB dma address limit with no alignment restrictions. - set 4096 alignment limit for Tx/Rx descriptor rings. - separate Rx buffer tag from Tx buffer tag such that Tx tag allows up-to 16 segments while Rx buffer tag only allows single segment. - it seems the controller has no alignment restrictions on Tx/Rx buffers. Remove ETHER_ALIGN alignment restriction in Tx/Rx buffers. - created a spare Rx dma map which would be used to cope with failure of loading a dma map. - make sure to load full Tx/Rx descriptor size for Tx/Rx descriptor dma maps, previously bfe(4) used to load single descriptor size for each descriptor rings. I have no idea how it could be run without problems. - don't blindly cast bus_addr_t type to 32bits in bfe_dma_map(). - created bfe_dma_free() to free allocated dma memory/tags. - make sure to invoke bus_dmamap_sync(9) before/after processing descriptor rings/buffers. Because the hardware has severe dma address space limitation, bounce-buffers would be always used on systems with more than 1GB memory during descriptors/buffers access. - added Tx descriptor ring initialization function, bfe_list_tx_init(). - moved producer/consumer index initialization to bfe_list_tx_init() and bfe_list_rx_init() from bfe_chip_reset(). - added bfe_discard_buf() which will update loaded descriptors without unloading/reloading the dma map to speed up error recovery. - implemented Tx side bus_dmamap_load_mbuf_sg(9). The number of segments allowed was chosen to be 16 which should be enough for non-TSO capable hardwares. Setting SOF bit of Tx descriptor is done in the last to avoid potential race. - don't give up sending frames in bfe_start() until the hardware lacks free descriptors. - added XXX comment to second kick command and possible workaround. - implemented Rx side bus_dmamap_load_mbuf_sg(9). - removed bfe_dma_map_desc() as it's not needed anymore after the conversion to bus_dmamap_load_mbuf_sg(9). - added endianness support. With this change bfe(4) should work on any architectures that can create bounce buffers within 1GB address range. - add missing bus_dmamap_sync() in bfe_tx_eof()/bfe_rx_eof(). o Use PCI_BAR instead of hardcoded value to set BARs. Simplified register access with bus_write_4(9)/bus_read_4(9) and removed bfe_btag, bfe_bhandle, bfe_vhandle in softc as it's not used anymore. o Reorder device detach logic such that bfe_detach() is also used for handling driver attach failure case. o Remove unnecessary KASSERT in bfe_detach(). o Remove bfe_rx_cnt, bfe_up, bfe_vpd_prodname, bfe_vpd_readonly in softc. It's not used at all. o Remove BFE_RX_RING_SIZE/BFE_RX_RING_SIZE/BFE_LINK_DOWN. Tested by: kib, Gleb Kurtsou gleb.kurtsou at gmail dot com Ulrich Spoerlein uspoerlein at gmail dot com |
| H A D | if_bfe.c | diff 181953 Thu Aug 21 02:33:24 MDT 2008 yongari o Sort includes and add <endian.h> to support endianness. o Removed unneeded header files. o bus_dma(9) fix: - created parent tag with 1GB dma address limit with no alignment restrictions. - set 4096 alignment limit for Tx/Rx descriptor rings. - separate Rx buffer tag from Tx buffer tag such that Tx tag allows up-to 16 segments while Rx buffer tag only allows single segment. - it seems the controller has no alignment restrictions on Tx/Rx buffers. Remove ETHER_ALIGN alignment restriction in Tx/Rx buffers. - created a spare Rx dma map which would be used to cope with failure of loading a dma map. - make sure to load full Tx/Rx descriptor size for Tx/Rx descriptor dma maps, previously bfe(4) used to load single descriptor size for each descriptor rings. I have no idea how it could be run without problems. - don't blindly cast bus_addr_t type to 32bits in bfe_dma_map(). - created bfe_dma_free() to free allocated dma memory/tags. - make sure to invoke bus_dmamap_sync(9) before/after processing descriptor rings/buffers. Because the hardware has severe dma address space limitation, bounce-buffers would be always used on systems with more than 1GB memory during descriptors/buffers access. - added Tx descriptor ring initialization function, bfe_list_tx_init(). - moved producer/consumer index initialization to bfe_list_tx_init() and bfe_list_rx_init() from bfe_chip_reset(). - added bfe_discard_buf() which will update loaded descriptors without unloading/reloading the dma map to speed up error recovery. - implemented Tx side bus_dmamap_load_mbuf_sg(9). The number of segments allowed was chosen to be 16 which should be enough for non-TSO capable hardwares. Setting SOF bit of Tx descriptor is done in the last to avoid potential race. - don't give up sending frames in bfe_start() until the hardware lacks free descriptors. - added XXX comment to second kick command and possible workaround. - implemented Rx side bus_dmamap_load_mbuf_sg(9). - removed bfe_dma_map_desc() as it's not needed anymore after the conversion to bus_dmamap_load_mbuf_sg(9). - added endianness support. With this change bfe(4) should work on any architectures that can create bounce buffers within 1GB address range. - add missing bus_dmamap_sync() in bfe_tx_eof()/bfe_rx_eof(). o Use PCI_BAR instead of hardcoded value to set BARs. Simplified register access with bus_write_4(9)/bus_read_4(9) and removed bfe_btag, bfe_bhandle, bfe_vhandle in softc as it's not used anymore. o Reorder device detach logic such that bfe_detach() is also used for handling driver attach failure case. o Remove unnecessary KASSERT in bfe_detach(). o Remove bfe_rx_cnt, bfe_up, bfe_vpd_prodname, bfe_vpd_readonly in softc. It's not used at all. o Remove BFE_RX_RING_SIZE/BFE_RX_RING_SIZE/BFE_LINK_DOWN. Tested by: kib, Gleb Kurtsou gleb.kurtsou at gmail dot com Ulrich Spoerlein uspoerlein at gmail dot com |
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