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H A D | hwpmc_amd.c | diff 177344 Tue Mar 18 06:39:11 MDT 2008 adrian Sign-extend the 48-bit AMD PMC counter before treating it to a 64-bit 2's compliment. The 2's compliment transform is done so a "count down" sampling interval can be converted into a "count up" PMC value. a 2's complimented 'count down' value is written to the PMC counter; then the read-back counter is reverted via another 2's compliment. PR: kern/121660 Reviewed by: jkoshy Approved by: jkoshy MFC after: 1 week |
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